[AK4675]
■ Digital Block
Digital block is composed as Figure 56. Each block can be powered-down by power management bit (PMADL, PMADR,
PMDAL, PMDAR, PMSRA, PMSRB and PMPCM bits). When blocks from HPF to MIX are powered-down, both MIX
and SVOLA blocks should not be selected by SDOL/R bits and PFMXL/R bits.
PMADL or PMADR
HPF
A/D
HPFAD
PFSEL
PFSEL=0
PMADL
or
PMADR
HPF
LPF
HPF
LPF
PFSEL=1
PMDAL
or
PMDAR
or
Stereo
Separation
FIL3, EQ0,
GN1-0
PMSRA
5-band
Notch
EQ1-5
ALC, IVL/R
ADM
ALC
MIX
SDOL/R1-0 SDOD
SDTO Lch
SDTO Rch
SVAL/R2-0
SVOLA
SRMXL/R1-0
DAM, MIXD OVL/R
EQ
M
I
X
S
E
L
SDTI Lch
SDTI Rch
DATT 5-band
D/A
SMUTE
EQ
SDIM1-0
PMDAL
PMDAL or PMDAR or PMSRA
PFMXL/R1-0
or PMDAR
SRA1-0, MIXD
PMPCM
PMSRA
SDOA
SDOAD
SRC-A
SDTOA
SDTIA
SVB2-0
SVOLB
PMSRB
SRC-B
DATT-B
BVL7-0
BVMX1-0
SBMX1-0
CVL7-0
DATT-C
BIV2-0
SDTOB
SDTIB
SDOBD
BIVOL
Figure 56. Path Select of Digital Block
MS0963-E-00
2008/05
- 70 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
