[AK4675]
Note 31. PSR is applied to AVDDA and PVDDA with 100mVpp. This is the value of convoluting sinusoidal voltage of
100mVpp.
Note 32. PSR is applied to SVDDA with 0.89Vpp. This is the value of convoluting sinusoidal voltage of 100mVpp.
Note 33. When the input data is single-ended.
Note 34. VSS1 load capacitance to output pins. For differential signals, the load capacitance will be twice as big as this
value.
Note 35. PSR is applied to AVDDA with 100mVpp. This is the value of convoluting sinusoidal voltage of 100mVpp.
Note 36. PSR is applied to SVDDA with 100mVpp. This is the value of convoluting sinusoidal voltage of 100mVpp.
Note 37. The average current between SVDDA and VSS2A, when the SPP pin and SPN pin are shorted and 1kHz,
0.85Vrms sine wave is input at Single-ended mode.
Headphone-amp negative voltage
PVEE pin
C1
CN pin
VSS3A
Charge Pump Circuit
C2
CP pin
Figure 3. Charge Pump Circuit External Capacitor
Parameter
min
typ
max
Units
Battery Monitor: (BATCPU bit = “1”)
Input Resistance (VBATIN pin)
5
10
-
kΩ
Attenuation (VBATO / VBATIN) (Note 38)
Note 38. When input 4.4V to the VBATIN pin.
0.245
0.25
0.255
-
MS0963-E-00
2008/05
- 16 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
