[AK4673]
min
Mono Input: MIN pin (AIN3 bit = “0”; External Input Resistance=20kΩ)
typ
max
-
Units
Vpp
Parameter
Maximum Input Voltage (Note 18)
Gain (Note 19)
-
1.98
MIN Æ LOUT/ROUT
LOVL bit = “0”
0
+2
−20
−16.4
+4.5
dB
dB
dB
dB
−4.5
LOVL bit = “1”
HPG bit = “0”
HPG bit = “1”
-
−24.5
-
-
−15.5
-
MIN Æ HPL/HPR
Stereo Input: LIN2/RIN2/LIN4/RIN4 pins; LIN3/RIN3 pins (AIN3 bit = “1”)
Maximum Input Voltage (Note 20)
Gain
-
1.98
-
Vpp
LIN/RIN Æ LOUT/ROUT
LOVL bit = “0”
LOVL bit = “1”
HPG bit = “0”
HPG bit = “1”
0
+2
0
+4.5
dB
dB
dB
dB
−4.5
-
−4.5
-
-
+4.5
-
LIN/RIN Æ HPL/HPR
+3.6
Full-differential Mono Input: IN4+/− pins (L4DIF bit = “1”)
Maximum Input Voltage (Note 21)
Gain
-
3.96
-
Vpp
LOVL bit = “0”
LOVL bit = “1”
LOVL bit = “0”
dB
dB
dB
dB
dB
dB
IN4+/− Æ LOUT/ROUT
(LODIF bit = “0”)
IN4+/− Æ LOP/LON
−10.5
−6
−4
0
+2
−6
−2.4
−1.5
-
−4.5
-
−10.5
-
-
+4.5
-
−1.5
-
(LODIF bit = “1”) (Note 22) LOVL bit = “1”
HPG bit = “0”
HPG bit = “1”
IN4+/− Æ HPL/HPR
Note 18. Maximum voltage is in proportion to both AVDD and external input resistance (Rin). Vin = 0.6 x AVDD x Rin
/ 20kΩ (typ).
Note 19. The gain is in inverse proportion to external input resistance.
Note 20. Maximum Input voltage is proportional to AVDD voltage. Vout = 0.6 x AVDD (typ).
Note 21. Maximum Input voltage is proportional to AVDD voltage. Vout = (IN4+) − (IN4−) = 1.2 x AVDD (typ). The
signals with same amplitude and inverted phase should be input to IN4+ and IN4− pins, respectively.
Note 22. Vout = (LOP) − (LON) at LODIF bit = “1”.
MS0670-E-00
2007/09
- 12 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
