[AK4646]
D0
Addr Register Name
03H Signal Select 2
R/W
D7
DAFIL
R/W
0
D6
LOPS
R/W
0
D5
MGAIN1
R/W
0
D4
D3
D2
BEEPL
R/W
0
D1
SPKG1 SPKG0
R/W
0
LOVL1 LOVL0
R/W
0
R/W
0
R/W
0
Default
LOVL1-0: Output Stereo Line Gain Select (Table 41)
Default: 00(0dB)
BEEPL: Switch Control from MIN pin to Stereo Line Output
0: OFF (default)
1: ON
When PMLO bit is “1”, BEEPL bit is enabled. When PMLO bit is “0”, the LOUT/ROUT pins go to AVSS.
SPKG1-0: Speaker-Amp Output Gain Select (Table 43)
MGAIN1: MIC-Amp Gain Control (Table 19)
LOPS: Stereo Line Output Power-Save Mode
0: Normal Operation (default)
1: Power-Save Mode
DAFIL: Filter/ALC Path Select When PMADL bit = “1” or PMADR bit = “1”
0: ADC/Recording Path (default)
1: DAC/Playback Path
The SDTO pin outputs “L” with regardless of PMADL and PMADR bits when DAFIL bit = “1” and
PMDAC bit = “1”.
Addr Register Name
04H Mode Control 1
R/W
D7
PLL3
R/W
0
D6
PLL2
R/W
0
D5
PLL1
R/W
0
D4
PLL0
R/W
0
D3
BCKO
R/W
0
D2
0
R
0
D1
DIF1
R/W
1
D0
DIF0
R/W
0
Default
DIF1-0: Audio Interface Format (Table 16)
Default: “10” (Left justified)
BCKO: BICK Output Frequency Select at Master Mode (Table 10)
PLL3-0: PLL Reference Clock Select (Table 4)
Default: “0000” (LRCK pin)
Addr Register Name
05H Mode Control 2
R/W
D7
PS1
R/W
0
D6
PS0
R/W
0
D5
FS3
R/W
0
D4
0
R
0
D3
0
R
0
D2
FS2
R/W
0
D1
FS1
R/W
0
D0
FS0
R/W
0
Default
FS3-0: Sampling Frequency Select (Table 5 and Table 6) and MCKI Frequency Select (Table 11)
FS3-0 bits select sampling frequency at PLL mode and MCKI frequency at EXT mode.
PS1-0: MCKO Output Frequency Select (Table 9)
Default: “00” (256fs)
MS0557-E-05
2011/01
- 57 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
