ASAHI KASEI
[AK4644]
<Analog Mixing Circuit for Headphone Output>
When AIN3 bit = “0”, DACH, MINH, LINH2 and RINH2 bits controls each path switch.
MIN path mixing gain is −20dB(typ)@HPG bit = “0” when the external input resistance is 20kΩ.
LIN2, RIN2 and DAC pathes mixing gain is 0dB(typ)@HPG bit = “0”.
LINH2 bit
LIN2 pin
MIN pin
0dB
M
I
MINH bit
DACH bit
HPL pin
−
20dB
0dB
X
DAC Lch
Figure 57. HPL Mixing Circuit (AIN3 bit = “0”, HPG bit = “0”)
RINH2 bit
RIN2 pin
0dB
M
I
MINH bit
DACH bit
MIN pin
HPR pin
−
20dB
0dB
X
DAC Rch
Figure 58. HPR Mixing Circuit (AIN3 bit = “0”, HPG bit = “0”)
When AIN3 bit = “1”, DACH, LINH2, RINH2, LINH3, RINH3, MICL3 and MICR3 bits controls each path switch. All
pathes mixing gain is 0dB(typ)@HPG bit = “0”.
LINH2 bit
LIN2 pin
LIN3 pin
0dB
0dB
MICL3 bit
LINH3 bit
M
I
HPL pin
*These blocks are not
available at PLL mode.
LIN1 pin
MIC-Amp Lch
DAC Lch
X
DACH bit
0dB
Figure 59. HPL Mixing Circuit (AIN3 bit = “1”, HPG bit = “0”)
RINH2 bit
0dB
RIN2 pin
RIN3 pin
MICR3 bit
RINH3 bit
M
0dB
HPR pin
I
*These blocks are not
available at PLL mode.
RIN1 pin
MIC-Amp Rch
DAC Rch
X
DACH bit
0dB
Figure 60. HPR Mixing Circuit (AIN3 bit = “1”, HPG bit = “0”)
MS0477-E-01
2006/10
- 61 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
