ASAHI KASEI
[AK4644]
Units
min
typ
max
Parameter
Headphone-Amp Characteristics: DAC → HPL/HPR pins, ALC=OFF, IVOL=0dB, DVOL=0dB
Output Voltage (Note 15)
1.58
2.40
-
-
1.98
3.00
1.0
2.38
3.60
-
-
Vpp
Vpp
Vrms
Vrms
HPG bit = “0”, 0dBFS, HVDD=3.3V, RL=22.8Ω
HPG bit = “1”, 0dBFS, HVDD=5V, RL=100Ω
HPG bit = “1”, 0dBFS, HVDD=3.3V, RL=16Ω (Po=62mW)
HPG bit = “1”, 0dBFS, HVDD=5V, RL=16Ω (Po=70mW)
1.06
S/(N+D)
60
-
-
-
80
-
70
80
20
70
90
90
-
-
-
-
-
-
dBFS
dBFS
dBFS
dBFS
dB
HPG bit = “0”, −3dBFS, HVDD=3.3V, RL=22.8Ω
HPG bit = “1”, −3dBFS, HVDD=5V, RL=100Ω
HPG bit = “1”, 0dBFS, HVDD=3.3V, RL=16Ω (Po=62mW)
HPG bit = “1”, 0dBFS, HVDD=5V, RL=16Ω (Po=70mW)
(Note 16)
S/N (A-weighted)
(Note 17)
dB
Interchannel Isolation
(Note 16), PMAINL2/R2/L3/R3 bits = “1”
(Note 16), PMAINL2/R2/L3/R3 bits = “0”
(Note 17)
65
-
-
-
-
16
-
-
75
75
80
0.1
0.1
-
-
-
-
dB
dB
dB
dB
dB
Ω
(Note 16)
Interchannel Gain Mismatch
(Note 17)
Load Resistance
0.8
0.8
-
30
300
C1 in Figure 2
C2 in Figure 2
-
-
pF
pF
Load Capacitance
Mono Input: MIN pin (AIN3 bit = “0”; External Input Resistance=20kΩ)
Maximum Input Voltage (Note 18)
Gain (Note 19)
-
1.98
-
Vpp
MIN Æ LOUT/ROUT
LOVL bit = “0”
0
+2
−20
−16.4
+4.5
dB
dB
dB
dB
−4.5
LOVL bit = “1”
HPG bit = “0”
HPG bit = “1”
-
−24.5
-
-
−15.5
-
MIN Æ HPL/HPR
Note 15. Output voltage is proportional to AVDD voltage.
Vout = 0.6 x AVDD(typ)@HPG bit = “0”, 0.91 x AVDD(typ)@HPG bit = “1”.
Note 16. HPG bit = “0”, HVDD=3.3V, RL=22.8Ω.
Note 17. HPG bit = “1”, HVDD=5V, RL=100Ω.
Note 18. Maximum voltage is in proportion to both AVDD and external input resistance (Rin). Vin = 0.6 x AVDD x Rin
/ 20kΩ (typ).
Note 19. The gain is in inverse proportion to external input resistance.
HP-Amp
HPL/HPR pin
C1
Measurement Point
47µF
6.8Ω
16Ω
0.22µF
C2
10Ω
Figure 2. Headphone-Amp output circuit
MS0477-E-01
2006/10
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