ASAHI KASEI
[AK4644]
min
typ
max
Parameter
Headphone-Amp Characteristics:
DAC
→
HPL/HPR pins, ALC=OFF, IVOL=0dB, DVOL=0dB
Output Voltage (Note 15)
1.58
1.98
2.38
HPG bit = “0”, 0dBFS, HVDD=3.3V, R
L
=22.8Ω
2.40
3.00
3.60
HPG bit = “1”, 0dBFS, HVDD=5V, R
L
=100Ω
HPG bit = “1”, 0dBFS, HVDD=3.3V, R
L
=16Ω (Po=62mW)
-
1.0
-
HPG bit = “1”, 0dBFS, HVDD=5V, R
L
=16Ω (Po=70mW)
-
1.06
-
S/(N+D)
60
70
-
HPG bit = “0”,
−3dBFS,
HVDD=3.3V, R
L
=22.8Ω
-
80
-
HPG bit = “1”,
−3dBFS,
HVDD=5V, R
L
=100Ω
HPG bit = “1”, 0dBFS, HVDD=3.3V, R
L
=16Ω (Po=62mW)
-
20
-
HPG bit = “1”, 0dBFS, HVDD=5V, R
L
=16Ω (Po=70mW)
-
70
-
(Note 16)
80
90
-
S/N (A-weighted)
(Note 17)
-
90
-
Interchannel Isolation
(Note 16), PMAINL2/R2/L3/R3 bits = “1”
65
75
-
(Note 16), PMAINL2/R2/L3/R3 bits = “0”
-
75
-
(Note 17)
-
80
-
(Note 16)
-
0.1
0.8
Interchannel Gain Mismatch
(Note 17)
-
0.1
0.8
Load Resistance
16
-
-
C1 in Figure 2
-
-
30
Load Capacitance
C2 in Figure 2
-
-
300
Mono Input:
MIN pin (AIN3 bit = “0”; External Input Resistance=20kΩ)
Maximum Input Voltage (Note 18)
-
1.98
-
Gain (Note 19)
MIN LOUT/ROUT
LOVL bit = “0”
0
+4.5
−4.5
LOVL bit = “1”
-
+2
-
MIN HPL/HPR
HPG bit = “0”
−24.5
−20
−15.5
HPG bit = “1”
-
-
−16.4
Units
Vpp
Vpp
Vrms
Vrms
dBFS
dBFS
dBFS
dBFS
dB
dB
dB
dB
dB
dB
dB
Ω
pF
pF
Vpp
dB
dB
dB
dB
Note 15. Output voltage is proportional to AVDD voltage.
Vout = 0.6 x AVDD(typ)@HPG bit = “0”, 0.91 x AVDD(typ)@HPG bit = “1”.
Note 16. HPG bit = “0”, HVDD=3.3V, R
L
=22.8Ω.
Note 17. HPG bit = “1”, HVDD=5V, R
L
=100Ω.
Note 18. Maximum voltage is in proportion to both AVDD and external input resistance (Rin). Vin = 0.6 x AVDD x Rin
/ 20kΩ (typ).
Note 19. The gain is in inverse proportion to external input resistance.
HP-Amp
HPL/HPR pin
47µF
6.8Ω
C1
0.22µF
10Ω
C2
16Ω
Measurement Point
Figure 2. Headphone-Amp output circuit
MS0477-E-01
-9-
2006/10
AKM [ ASAHI KASEI MICROSYSTEMS ]
