ASAHI KASEI
[AK4644]
Headphone
10u
Power Supply
2.6 ∼ 3.6V
10 0.22u
10 0.22u
1u
1u
1u
0.1u
MUTET
ROUT
LOUT
MIN
DVSS
DVDD
BICK
25
26
27
28
29
30
31
32
16
15
14
13
12
11
10
9
200
200
Line Out
Mono In
DSP
LRCK
SDTO
SDTI
AK4644EN
RIN2
LIN2
Top View
Line In
LIN1
CDTI
RIN1
CCLK
µP
Cp
Digital Ground
Analog Ground
Notes:
- AVSS, DVSS and HVSS of the AK4644 should be distributed separately from the ground of external
controllers.
- All digital input pins should not be left floating.
- When the AK4644 is EXT mode (PMPLL bit = “0”), a resistor and capacitor of VCOC pin is not needed.
- When the AK4644 is PLL mode (PMPLL bit = “1”), a resistor and capacitor of VCOC pin is shown in Table 5.
- When the AK4644 is used at master mode, LRCK and BICK pins are floating before M/S bit is changed to “1”.
Therefore, 100kΩ around pull-up resistor should be connected to LRCK and BICK pins of the AK4644.
Figure 72. Typical Connection Diagram (AIN3 bit = “0”, Line Input)
MS0477-E-01
2006/10
- 80 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
