[AK4634]
■ MONO LINE OUTPUT (AOUT pin)
A signal of DAC is output from the AOUT pin. When the DACA bit is “0”, this output is OFF. When the LOVL bit is “1”,
this gain changes to +2dB. The load resistance is 10kΩ(min). When PMAO bit is “0” and AOPSN bit is “0”, the mono
line output enters power-down and is pulled down by 100Ω(typ). If PMAO bit is controlled at AOPS bit = “1”, POP noise
will be reduced at power-up and down. Then, this line should be pulled down by 20kΩ of resister after C-coupling shown
in Figure 41. This rising and falling time is max 300 ms at C = 1.0μF . When PMAO bit is “1” and AOPS bit is “0”, the
mono line output enters power-up state.
LOVL bits
Gain
0dB
+2dB
0
1
(default)
Table 36. Mono line output volume setting
1μF
220Ω
AOUT
20kΩ
Figure 41. AOUT external circuit when using POP Reduction function
AOUT Control Sequence in case of using POP Reduction Circuit
(2 )
(5 )
P M A O b it
A O P S b it
(1 )
(3 )
(4 )
(6 )
A O U T p in
N o rm a l O u tp u t
≥ 3 0 0 m s
≥ 3 0 0 m s
Figure 42. Mono Line Output Control Sequence when using POP Reduction function
(1) Set AOPS bit = “1”. Mono line output enters the power-save mode.
(2) Set PMAO bit = “1”. Mono line output exits the power-down mode.
AOUT pin rises up to VCOM voltage. Rise time is 200ms (max 300ms) at C=1μF.
(3) Set AOPS bit = “0” after AOUT pin rises up. Mono line output exits the power-save mode.
Mono line output is enabled.
(4) Set AOPS bit = “1”. Mono line output enters power-save mode.
(5) Set PMAO bit = “1”. Mono line output enters power-down mode.
AOUT pin falls down to VSS1. Fall time is 200ms (max 300ms) at C=1μF.
(6) Set AOPS bit = “0” after AOUT pin falls down. Mono line output exits the power-save mode.
Rev. 0.5
2007/10
- 50 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
