[AK4634]
■ ALC Operation
ALC Operation works in ALC block. When ADCPF bit = “1”, ALC operation is enable for recording path. When ADCPF
bit = “0”, ALC operation is enable for playback path. The ON/OFF of ALC operation for recording is controlled by ALC1
bit and the ON/OFF of ALC operation for playback is controlled by ALC2 bit.
1. ALC Limiter Operation
When the ALC limiter is enabled, and output exceeds the ALC limiter detection level (Table 25), the volume value is
attenuated by the amount defined in LMAT1-0 bits (Table 26) automatically.
When the ZELMN bit = “0” (zero crossing detection valid), the VOL value is changed by ALC limiter operation at the
zero crossing point or zero crossing timeout. Zero crossing timeout period is set by ZTM1-0 bit that in common with ALC
recovery zero crossing timeout period’s setting (Table 27).At LFST bit = “1”, VOL value is attenuated 1step immediately
(period: 1/fs) when output Level is over FS(Digital Full Scale).
When the ZELMN bit = “1” (zero crossing detection invalid), VOL value is changed immediately (period: 1/fs) by ALC
limiter operation. The attenuation for limiter operation is fixed to 1 step and not controlled by setting LMAT1-0 bits.
After finishing the attenuate operation, if ALC bit does not change to “0”, the operation repeats when the output signal
level exceeds the ALC limiter detection level.
LMTH1 LMTH0 ALC Limiter Detection Level ALC Recovery Waiting Counter Reset Level
0
0
1
1
0
1
0
1
ALC Output ≥ −2.5dBFS
ALC Output ≥ −4.1dBFS
ALC Output ≥ −6.0dBFS
ALC Output ≥ −8.5dBFS
−2.5dBFS > ALC Output ≥ −4.1dBFS
−4.1dBFS > ALC Output ≥ −6.0dBFS
−6.0dBFS > ALC Output ≥ −8.5dBFS
−8.5dBFS > ALC Output ≥ −12dBFS
(default)
Table 25. ALC Limiter Detection Level / Recovery Waiting Counter Reset Level
ALC1 Limiter ATT Step
LMAT1
LMAT0
ALC1 Output ALC1 Output ALC1 Output ALC1 Output
≥ LMTH
≥ FS
≥ FS + 6dB
≥ FS + 12dB
0
0
1
1
0
1
0
1
1
2
2
1
1
2
4
2
1
2
4
4
1
2
8
8
(default)
Table 26. ALC Limiter ATT Step Setting
Zero Crossing Timeout Period
ZTM1
ZTM0
8kHz
16ms
32ms
64ms
128ms
16kHz
8ms
16ms
32ms
64ms
44.1kHz
2.9ms
5.8ms
11.6ms
23.2ms
0
0
1
1
0
1
0
1
128/fs
256/fs
512/fs
1024/fs
(default)
Table 27. ALC Zero Crossing Timeout Period Setting
Rev. 0.5
2007/10
- 43 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
