ASAHI KASEI
[AK4588]
No.
31
32
Pin Name
PDN
MASTER
I/O
I
I
Function
Power-Down Mode Pin
When “L”, the AK4588 is powered-down, all output pin goes “L”, all registers are
reset. When CAD1-0 pins are changed, the AK4588 should be reset by PDN pin.
Master Mode Select Pin
“H”: Master mode, “L”: Slave mode
Zero Input Detect 2 Pin
(Table 13)
When the input data of the group 1 follow total 8192 LRCK cycles with “0” input
data, this pin goes to “H”. When RSTN1 bit is “0” or PWDAN bit is “0”, this pin
goes to “H”.
Analog Input Overflow Detect Pin
This pin goes to “H” if the analog input of Lch or Rch overflows. This pin becomes
OVF pin if OVFE bit is set to 1.
Zero Input Detect 1 Pin
(Table 13)
When the input data of the group 1 follow total 8192 LRCK cycles with “0” input
data, this pin goes to “H”. When RSTN1 bit is “0” or PWDAN bit is “0”, this pin goes
to “H”.
DAC4 Lch Analog Output Pin
No Connect pin
No internal bonding. This pin should be opened.
DAC4 Rch Analog Output Pin
No Connect pin
No internal bonding. This pin should be opened.
DAC3 Lch Analog Output Pin
No Connect pin
No internal bonding. This pin should be opened.
DAC3 Rch Analog Output Pin
No Connect pin
No internal bonding. This pin should be opened.
DAC2 Lch Analog Output Pin
No Connect pin
No internal bonding. This pin should be opened.
DAC2 Rch Analog Output Pin
No Connect pin
No internal bonding. This pin should be opened.
DAC1 Lch Analog Output Pin
No Connect pin
No internal bonding. This pin should be opened.
DAC1 Rch Analog Output Pin
No Connect pin
No internal bonding. This pin should be opened.
Lch Analog Input Pin
Rch Analog Input Pin
Common Voltage Output Pin
2.2µF capacitor should be connected to AVSS externally.
Positive Voltage Reference Input Pin, AVDD
DZF2
33
OVF
O
O
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
DZF1
LOUT4
NC
ROUT4
NC
LOUT3
NC
ROUT3
NC
LOUT2
NC
ROUT2
NC
LOUT1
NC
ROUT1
NC
LIN
RIN
VCOM
VREFH
O
O
-
O
-
O
-
O
-
O
-
O
-
O
-
O
-
I
I
-
-
MS0287-E-01
-7-
2004/03
AKM [ ASAHI KASEI MICROSYSTEMS ]
