ASAHI KASEI
[AK4564]
Headphone-Amps are powered-up/down by HPP bit. When HPP bit is “0”, Headphone-Amps are powered-down and
HPL and HPR pins are fixed to “L” (AVSS). At power-up/down, the common voltage of HPL/HPR pin is settled by a
constant which determined by the internal resistor and the external capacitors. The internal resistor is 50kW(typ) at
power-up, and 1kW(typ) at power-down. (Refer to Figure 16)
Rising Time of Headphone-Amp: t1 = 50kW x C1
Falling Time of Headphone-Amp: t 2= 1kW x (C1 + 2 x C2)
For example; C1 = 4.7mF, C2 = 100mF
t1 = 235ms
t2 = 205ms
HPMIX bit
HP-Amp
From MIX1
HPL, HPR
16W
HPDAC bit
BEEP2H bit
C2
-
From DAC
+
+
16W
MUTET
From BEEP2
+
C1
Figure 16. Headphone-Amp internal equivalent circuit
HPP bit
HPDAC, HPMIX or BEEP2H bit
HPL/HPR pin
t 2
t 1
(1) (2)
Figure 17. Headphone-Amp Power-Up/Down Timing
(1) Power-up Headphone-Amps: WR (HPP= “1”)
(3) (4)
The common voltage of HPL/HPR pins rises by the time constant. (t 1)
(2) Enable Headphone-Amp inputs: WR (HPDAC, HPMIX or BEEP2H =“1”)
The input signals from MIX1, DAC and BEEP2 are output. Headphone-Amps can output the signals while the
common voltage is rising.
(3) Disable Headphone-Amp inputs: WR (HPDAC=HPMIX=BEEP2H=“0”)
The input signal from MIX1, DAC and BEEP2 are muted. Headphone-Amps output HVCM voltage during muting.
(4) Power-down Headphone-Amps: WR (HPP=“0”)
The common voltage of HPL/HPR pins falls by the time constant. (t2)
MS0140-E-01
2002/07
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