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AK4541VQ 参数 Datasheet PDF下载

AK4541VQ图片预览
型号: AK4541VQ
PDF下载: 下载PDF文件 查看货源
内容描述: AC'97 2.1版本的多媒体音频编解码器 [AC’97 Rev 2.1 Multimedia Audio CODEC]
分类和应用: 解码器编解码器消费电路商用集成电路
文件页数/大小: 31 页 / 384 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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[ASAHI KASEI]  
[AK4541]  
Slot  
0
1
2
3
4
5
6
7
8
9
10  
11  
12  
SYNC  
Codec ID1:Codec ID0=0:0 or 0:1  
TAG Command Command PCM(dac) PCM(dac)  
SDATA  
OUT  
All  
“0”  
All  
“0”  
All  
”0”  
All  
“0”  
All  
“0”  
All  
“0”  
All  
“0”  
All  
“0”  
Address  
Codec ID1:Codec ID0=1:0  
TAG Command Command  
Data  
Left  
Right  
All  
“0”  
All  
“0”  
All  
“0”  
All  
“0”  
PCM(dac) PCM(dac)  
Left  
All  
“0”  
All  
“0”  
All  
“0”  
All  
“0”  
Address Data  
Right  
Codec ID1:Codec ID0=1:1  
TAG  
TAG  
Command Command  
All  
“0”  
All  
“0”  
All  
“0”  
PCM(dac)  
Left  
All  
”0”  
All  
“0”  
PCM(dac)  
Right  
All  
“0”  
All  
“0”  
All  
“0”  
Address  
Data  
SDATA  
IN  
Status  
Address  
Status  
Data  
PCM(adc) PCM(adc)  
Left Right  
All  
“0”  
All  
“0”  
All  
”0”  
All  
“0”  
All  
“0”  
All  
“0”  
All  
“0”  
All  
“0”  
Tag Phase  
Data Phase  
48kHz  
AC-link protocol identifies 13slots of data per frame. The frequency of sync is fixed to 48kHz. Only Slot 0, which is  
the Tag phase, is 16bits, all other slots are 20bits in length. These slots are explained in later sections.  
AC-link Audio Output Frame (SDATA_OUT)  
a)Slot 0  
Primary codec (Codec ID1 : Codec ID0 = 0 : 0)  
SYNC  
BIT_CLK  
Valid  
Frame  
Slot7 Slot8 Slot9 Slot10  
Slot12  
Bit3  
Slot11  
Bit7” Bit6” Bit5” Bit4  
“0”  
Slot1 Slot2 Slot3 Slot4 Slot5 Slot6  
SDATA_OUT  
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9” Bit8  
Bit2  
“0”  
Bit1  
“0”  
Bit0  
“0”  
“0” “0”  
“1/0” “1/0” “1/0” “1/0” “1/0” “0”  
Slot 0  
“0” “0”  
“0” “0”  
Slot 1  
1 BIT_CLK delay  
Secondary codec (Codec ID1 : Codec ID0 0 : 0)  
SYNC  
BIT_CLK  
Valid  
Frame  
Slot7 Slot8 Slot9 Slot10  
Slot12  
Bit3  
Slot11  
Bit4  
Slot1 Slot2 Slot3 Slot4 Slot5 Slot6  
SDATA_OUT  
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10  
Bit8  
Bit7” Bit6”  
Bit2  
“0”  
Bit1  
Bit0  
Bit9”  
Bit5”  
“0”  
“0” “0”  
“1/0” “1/0”  
“1/0 “0”  
“0” “1/0 “1/0 “0”  
Slot 0  
“1/0 “1/0 “1/0 “1/0  
Slot 1  
1 BIT_CLK delay  
The AK4541 checks bit15 (valid frame bit). Note that when the valid frame bit is “1”, at least one bit14-6 (slot 1-  
9) or bit1-0 must be valid, bit5-2 will be “0”and should be ignored.  
If bit15 is “0”, the AK4541 ignores all following information in the frame.  
The AK4541 then checks the validity of each bit in the TAG phase (slot 0).  
If each bit is “0”, the AK4541 ignores the slot indicated by “0”. On the other hand, if each bit is “1”, the slot is valid.  
All bits in slot10-12(bit5-3) are “0” and bit2 is also “0”.  
The AK4541 monitors bit1 and 0, which are codec ID configuration bits used in multiple codec implementations.  
These bits are used to identify which codec the frame data is issued to.  
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<M0047-E-01>  
1999/01