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AK4532 参数 Datasheet PDF下载

AK4532图片预览
型号: AK4532
PDF下载: 下载PDF文件 查看货源
内容描述: 互联网/网络/通用多媒体音频编解码器 [Internet/Network/General Purpose Multimedia Audio CODEC]
分类和应用: 解码器编解码器
文件页数/大小: 17 页 / 347 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
 浏览型号AK4532的Datasheet PDF文件第6页浏览型号AK4532的Datasheet PDF文件第7页浏览型号AK4532的Datasheet PDF文件第8页浏览型号AK4532的Datasheet PDF文件第9页浏览型号AK4532的Datasheet PDF文件第11页浏览型号AK4532的Datasheet PDF文件第12页浏览型号AK4532的Datasheet PDF文件第13页浏览型号AK4532的Datasheet PDF文件第14页  
ASAHI KASEI  
[AK4532]  
D1  
OPERATION OVERVIW  
1. CONTROL REGISTER MAP  
Addr Register Name  
D7  
D6  
D5  
D4  
D3  
D2  
D0  
00  
01  
02  
03  
08  
09  
0A  
0B  
10  
11  
12  
13  
14  
15  
16  
19  
Master Volume Lch  
Master Volume Rch  
Voice Volume Lch  
Voice Volume Rch  
Line Volume Lch  
MUTE  
MUTE  
MUTE  
MUTE  
MUTE  
MUTE  
MUTE  
MUTE  
ATT4  
ATT4  
GAI4  
GAI4  
GAI4  
GAI4  
GAI4  
GAI4  
LineL  
ATT3  
ATT3  
GAI3  
GAI3  
GAI3  
GAI3  
GAI3  
GAI3  
LineR  
ATT2  
ATT2  
GAI2  
GAI2  
GAI2  
GAI2  
GAI2  
GAI2  
ATT1 ATT0  
ATT1 ATT0  
GAI1  
GAI1  
GAI1  
GAI1  
GAI1  
GAI1  
GAI0  
GAI0  
GAI0  
GAI0  
GAI0  
GAI0  
MIC  
Line Volume Rch  
AUX Volume Lch  
AUX Volume Rch  
Output Mixer SW 1  
Output Mixer SW 2  
Lch Input Mixer SW 1  
Rch Input Mixer SW 1  
Lch Input Mixer SW 2  
Rch Input Mixer SW 2  
Reset and Power Down  
MIC Amp Gain  
AUXL AUXR VoiceL VoiceR  
LineL  
LineL  
AUXL  
AUXL  
LineR  
LineR  
AUXR VoiceL  
AUXR VoiceR  
PD  
RST  
MGAIN  
Note: ATT* is data bits for the attenuation level.  
GAI* is data bits for the gain level.  
IMPORTANT: There is the compatibility between the AK4531 and AK4532. But the input mixer  
functions of those device has some different implication in the application, receptively.  
And the other address of control register except those described in the above table and “1A” are  
“do not care”. Address “1A” for testing shall be strictly prohibited to access.  
Be ware that the three MSB address bits(A7, A6, A5) are ignored by AK4532. Writing to address  
“20” register will update the address “00” register for instance.  
2. WRITE Timing of Control Register  
CS  
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15  
CCLK  
CDATA  
A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0  
A7-A0: Address  
D7-D0: Control Data  
3. Control Register Definitions  
Addr  
00  
01  
Register Name  
Master Volume Lch  
Master Volume Rch  
D7  
MUTE  
MUTE  
D6  
D5  
D4  
ATT4  
ATT4  
D3  
ATT3  
ATT3  
D2  
ATT2  
ATT2  
D1  
ATT1  
ATT1  
D0  
ATT0  
ATT0  
MUTE  
1:  
0:  
MUTE  
No MUTE  
32 levels with 2 dB step  
ATT4:0  
00000: 0dB  
11111: -62 dB  
“0000 0000”(No MUTE & 0dB)  
Initial  
0178-E-01  
10  
1999/06