ASAHI KASEI
[AK4528]
SYSTEM DESIGN
Figure 11 shows the system connection diagram. An evaluation board (AKD4528) is available which demonstrates
application circuits, the optimum layout, power supply arrangements and measurement results.
4.75 ~ 5.25V
Analog Supply
0.1u
2.2u
+
1
2
3
4
5
6
7
8
9
VCOM
AINR+
AINR-
AINL+
AINL-
VREF
AGND
AOUTR+ 28
AOUTR- 27
AOUTL+ 26
AOUTL- 25
Rch
LPF
Rch Out
Lch Out
Rch
Input
Buffer
Lch
LPF
Lch
Input
Buffer
DGND
VD
24
23
22
21
20
19
18
5
+
0.1u 0.1u
10u
2.7 ~ 5.25V
Digital Supply
AK4528
VT
0.1u
VA
DEM1
DEM0
PDN
DFS
P/S
10 MCLK
11 LRCK
12 BICK
13 SDTO
14 SDTI
Audio
Controller
Mode
Setting
CSN/DIF 17
16
15
CCLK/CKS1
CDTI/CKS0
Notes:
- AGND and DGND of AK4528 should be distributed separately from the ground of external controller etc.
- When AOUT+/- drives some capacitive load, some resistor should be added in series between AOUT+/- and
capacitive load.
- All input pins should not be left floating.
Figure 11. Typical Connection Diagram
1. Grounding and Power Supply Decoupling
The AK4528 requires careful attention to power supply and grounding arrangements. VA and VD are usually supplied
from analog supply in system. Alternatively if VA and VD are supplied separately, the power up sequence is taken care.
VT is a power supply pin to interface with the external ICs and is supplied from digital supply in system. AGND and
DGND of the AK4528 should be connected to analog ground plane. System analog ground and digital ground should be
connected together near to where the supplies are brought onto the printed circuit board. Decoupling capacitors should be
as near to the AK4528 as possible, with the small value ceramic capacitor being the nearest.
MS0011-E-00
2000/1
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AKM [ ASAHI KASEI MICROSYSTEMS ]
