[AK4426]
SYSTEM DESIGN
Figure 20 shows the system connection diagram. An evaluation board (AKD4426) is available for fast evaluation as well
as suggestions for peripheral circuitry.
Analog
5.0V
+
0.1u
10u
VSS1
CP
VDD
16
15
14
13
1
2
3
4
MCLK
BICK
SDTI
LRCK
CAD0
SCL
+
Master Clock
CN
1u (1)
1u (1)
64fs
VEE
24bit Audio Data
AK4426AOUTL
fs
12
11
10
9
5
6
7
Lch Out
10u
VSS2
AVDD
0.1u
μP
+
AOUTR
SDA
8
Rch Out
Analog Ground
Digital Ground
Note:
Use low ESR (Equivalent Series Resistance) capacitors. When using polarized capacitors, the positive polarity pin
should be connected to the CP and VSS2 pin.
VSS1 and VSS2 should be separated from digital system ground.
Digital input pins should not be allowed to float.
Figure 20. Typical Connection Diagram
MS1176-E-02
2011/03
- 24 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
