欢迎访问ic37.com |
会员登录 免费注册
发布采购

AK4387 参数 Datasheet PDF下载

AK4387图片预览
型号: AK4387
PDF下载: 下载PDF文件 查看货源
内容描述: 106分贝192kHz的24位双声道ツヒDAC [106dB 192kHz 24-Bit 2ch ツヒ DAC]
分类和应用:
文件页数/大小: 21 页 / 246 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
 浏览型号AK4387的Datasheet PDF文件第1页浏览型号AK4387的Datasheet PDF文件第2页浏览型号AK4387的Datasheet PDF文件第3页浏览型号AK4387的Datasheet PDF文件第4页浏览型号AK4387的Datasheet PDF文件第6页浏览型号AK4387的Datasheet PDF文件第7页浏览型号AK4387的Datasheet PDF文件第8页浏览型号AK4387的Datasheet PDF文件第9页  
ASAHI KASEI
[AK4387]
DC CHARACTERISTICS
(Ta=25°C; AVDD=DVDD=4.5
5.5V)
Parameter
High-Level Input Voltage
Low-Level Input Voltage
High-Level Output Voltage (Iout=-80µA)
Low-Level Output Voltage
(Iout=80µA)
Input Leakage Current
Symbol
VIH
VIL
VOH
VOL
Iin
min
2.2
-
AVDD-0.4
-
-
typ
-
-
-
-
max
-
0.8
-
0.4
±
10
Units
V
V
V
V
µA
SWITCHING CHARACTERISTICS
(Ta=25°C; AVDD=DVDD=4.5
5.5V, C
L
= 20pF)
Parameter
Symbol
min
typ
fCLK
2.048
11.2896
Master Clock Frequency
Duty Cycle
dCLK
40
LRCK Frequency
Normal Speed Mode
fsn
8
Double Speed Mode
fsd
60
Quad Speed Mode
fsq
120
Duty Cycle
Duty
45
Audio Interface Timing
BICK Period
Normal Speed Mode
tBCK
1/128fs
Double/Quad Speed Mode
tBCK
1/64fs
BICK Pulse Width Low
tBCKL
30
Pulse Width High
tBCKH
30
BICK rising to LRCK Edge
(Note 11)
tBLR
20
LRCK Edge to BICK rising
(Note 11)
tLRB
20
SDTI Hold Time
tSDH
20
SDTI Setup Time
tSDS
20
Control Interface Timing
CCLK Period
tCCK
200
CCLK Pulse Width Low
tCCKL
80
Pulse Width High
tCCKH
80
CDTI Setup Time
tCDS
40
CDTI Hold Time
tCDH
40
CSN “H” Time
tCSW
150
tCSS
50
CSN “↓” to CCLK “↑”
tCSH
50
CCLK “↑” to CSN “↑”
Reset Timing
RSTN Pulse Width
(Note 12)
tPD
150
Note 11. BICK rising edge must not occur at the same time as LRCK edge.
Note 12. The AK4387 can be reset by bringing RSTN pin = “L”.
max
36.864
60
48
96
192
55
Units
MHz
%
kHz
kHz
kHz
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MS0429-E-00
-5-
2005/09