[AK4386]
ピン／機½
No. Pin Name
1 MCLK
2 BICK
3 SDTI
4 LRCK
5
6
7
8
9
10
11
12
13
14
15
16
PDN
DFS0
DFS1
DEM
DIF0
ROUT
LOUT
VCOM
VSS
VDD
DIF1
TEST
I/O
I
I
I
I
I
I
I
I
I
O
O
O
-
-
I
I
Function
Master Clock Input Pin
Audio Serial Data Clock Pin
Audio Serial Data Input Pin
Input Channel Clock Pin
Full Power Down Mode Pin
“L” : Power down, “H” : Power up
Sampling Speed Select 0 Pin
Sampling Speed Select 1 Pin
De-emphasis Filter Enable Pin
“L” : OFF, “H” : ON (De-emphasis of fs=44.1kHz is enable.)
Audio Interface Format 0 Pin
Rch Analog Output Pin
Lch Analog Output Pin
Common Voltage Output Pin, 0.55
×
VDD
Normally connected to VSS with a 4.7μF (min. 1μF, max. 10μF) electrolytic
capacitor.
Ground Pin
Power Supply Pin, 2.2
∼
3.6V
Audio Interface Format 1 Pin
Test Pin
This pin should be connected to VDD.
Note: All digital input pins should not be left floating.
■
½用しないピンの処理について
½用しない出力ピンは下記の設定を行い、適切に処理して下さい。
区分
Analog
ピン名
LOUT, ROUT
設定
オープン
MS0280-J-01
-3-
2008/10
AKM [ ASAHI KASEI MICROSYSTEMS ]
