ASAHI KASEI
[AK4380]
SWITCHING CHARACTERISTICS
(Ta = 25°C; VDD = 4.5
∼
5.5V; C
L
= 20pF)
Parameter
Master Clock Frequency
Duty Cycle
LRCK Frequency
Duty Cycle
Audio Interface Timing
BICK Period
Normal Speed Mode
Double Speed Mode
BICK Pulse Width Low
Pulse Width High
BICK “↑” to LRCK Edge
(Note 10)
LRCK Edge to BICK “↑”
(Note 10)
SDTI Hold Time
SDTI Setup Time
Control Interface Timing
CCLK Period
CCLK Pulse Width Low
Pulse Width High
CDTI Setup Time
CDTI Hold Time
CSN High Time
CSN “↓” to CCLK “↑”
CCLK “↑” to CSN “↑”
Reset Timing
PDN Pulse Width
(Note 11)
Symbol
fCLK
dCLK
fs
Duty
min
2.048
40
8
45
typ
11.2896
44.1
max
36.864
60
96
55
Units
MHz
%
kHz
%
tBCK
tBCK
tBCKL
tBCKH
tBLR
tLRB
tSDH
tSDS
tCCK
tCCKL
tCCKH
tCDS
tCDH
tCSW
tCSS
tCSH
tPD
1/128fs
1/64fs
70
70
40
40
40
40
200
80
80
40
40
150
50
50
150
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes: 10. BICK rising edge must not occur at the same time as LRCK edge.
11. The AK4380 can be reset by PDN= “L” upon power up.
If MCLK frequency or DFS changes, the AK4380 should be reset by PDN pin or RSTN bit.
MS0018-E-01
-6-
2000/8
AKM [ ASAHI KASEI MICROSYSTEMS ]
