ASAHI KASEI
[AK4370]
■ Register Map
Addr Register Name
00H Power Management
01H Clock Control 0
02H Clock Control 1
03H Mode Control 0
04H Mode Control 1
05H DAC Lch ATT
06H DAC Rch ATT
07H Headphone Out Select 0
08H Lineout Select 0
09H Lineout ATT
0AH Reserved
D7
0
FS3
0
0
ATS
ATTL7
ATTR7
D6
0
FS2
0
MONO1
DATTC
ATTL6
ATTR6
HPG0
LOG
0
0
0
0
0
HPZ
0
0
D5
PMLO
FS1
M/S
MONO0
D4
D3
D2
D1
D0
MUTEN PMHPR PMHPL PMDAC PMVCM
FS0
MCKAC
BCKP
0
BF
LRP
BST1
ATTL3
ATTR3
0
0
0
0
0
0
DIF2
BST0
ATTL2
ATTR2
DIF1
DEM1
ATTL1
ATTR1
DIF0
DEM0
ATTL0
ATTR0
LMUTE SMUTE
ATTL5
ATTR5
LIN2HR LIN2HL RIN1HR LIN1HL DARHR DALHL
LIN2R
ATTL4
ATTR4
HPG1
0
0
0
0
0
0
0
0
0
0
0
0
LIN2L
RIN1R
ATTS3
LIN1L
ATTS2
DARR
ATTS1
DALL
ATTS0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0BH Reserved
0CH Reserved
0
0
RIN2HR RIN2HL LIN1HR RIN1HL
ATTH3
RIN2R
L2M
0DH Headphone Out Select 1
0EH Headphone ATT
0FH Lineout Select 1
10H Mono Mixing
11H Differential Select
12H Reserved
HMUTE
ATTH4
ATTH2
RIN2L
L2HM
ATTH1
LIN1R
L1M
LDIFH
0
ATTH0
RIN1L
L1HM
LDIF
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
13H Reserved
All registers inhibit writing at PDN pin = “L”.
PDN pin = “L” resets the registers to their default values.
For addresses from 14H to 1FH, data must not be written.
Unused bits must contain a “0” value.
Unused bits must contain a “1” value
MS0595-E-00
2007/03
- 38 -