ASAHI KASEI
[AK4368]
Parameter
Symbol
min
typ
max
Units
Control Interface Timing (I2C Bus mode): (Note 23)
SCL Clock Frequency
fSCL
tBUF
-
-
-
-
-
-
-
-
-
-
-
-
-
400
-
-
-
-
-
-
-
kHz
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
ns
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low Time
1.3
0.6
1.3
0.6
0.6
0
0.1
-
-
tHD:STA
tLOW
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tR
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling (Note 24)
SDA Setup Time from SCL Rising
Rise Time of Both SDA and SCL Lines
Fall Time of Both SDA and SCL Lines
Setup Time for Stop Condition
0.3
0.3
-
tF
tSU:STO
tSP
0.6
0
Pulse Width of Spike Noise Suppressed by Input Filter
Power-down & Reset Timing
50
PDN Pulse Width (Note 25)
tPD
150
-
-
ns
Note 23. I2CはPhilips Semiconductorsの登録商標です。
Note 24. データは最低300ns (SCLの立ち下がり時間)の間保持されなければなりません。
Note 25. 電源投入時はPDN pinを“L” から“H” にすることでリセットがかかります。
MS0409-J-01
2005/08
- 13 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
