ASAHI KASEI
[AK4356]
OPERATION OVERVIEW
n System Clock Input
The external clocks which are required to operate the AK4356 are MCLK, LRCK and BICK. The master clock (MCLK)
should be synchronized with sampling clock (LRCK) but the phase is not critical. MCLK is used to operate the digital
interpolation filter and the delta-sigma modulator. The frequency of MCLK can be set by CKS0-2, and can be selected to
normal, double or 4 times speed mode by DFS0-1 (See Table 1). 4 times speed mode can be used for only DAC1. If DAC1
is in 4 times speed mode, DAC2 and DAC3 are automatically powered down. When the states of SLOW, DIF2-0, DFS1-0
or CKS2-0 changes, the AK4356 should be reset by PDN pin or RSTN bit.
All external clocks (MCLK, BICK and LRCK) should always be present whenever the AK4356 is in normal operation
mode (PDN = “H”). If these clocks are not provided, the AK4356 may draw excess current and may not possibly operate
properly because the device utilizes dynamic refreshed logic internally. If the external clocks are not present, the AK4356
should be in the power-down mode (PDN = “L” or all DACs are set in the power-down mode by PW1-3 bits) or in the reset
mode (RSTN = “0”). After exiting reset at power-up etc., the AK4356 is in the power-down mode until MCLK and LRCK
are input.
DFS1-0
Mode
CKS2
CKS1
CKS0
“00”
“01”
“10”
(Normal Speed) (Double Speed) (4 times Speed)
0
1
2
3
4
5
6
7
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
256fs
256fs
384fs
384fs
512fs
512fs
768fs
768fs
128fs
256fs
192fs
384fs
256fs
N/A
N/A
N/A
N/A
N/A
128fs
N/A
192fs
N/A
default (DFS1-0 = “00”)
384fs
N/A
Table 1. System Clock (DFS1-0 = “11”: reserved)
fs [kHz]
Mode
128fs
-
8.1920 12.2880
16.3840 24.5760
192fs
-
256fs
384fs
512fs
16.3840
768fs
24.5760
32
64
Normal
Double
4 times
Normal
Double
4 times
Normal
Double
4 times
8.1920
16.3840
-
11.2896
22.5792
-
12.2880
24.5760
-
12.2880
24.5760
-
16.9344
33.8688
-
18.4320
36.8640
-
-
-
-
-
128
44.1
88.2
176.4
48
-
-
22.5792
33.8688
11.2896
22.5792
-
12.2880
24.5760
16.9344
33.8688
-
18.4320
36.8640
-
-
-
-
24.5760
36.8640
96
192
-
-
-
-
Table 2. Example of System Clock [MHz]
M0072-E-01
1999/09
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