ASAHI KASEI
[AK4319A]
OPERATION OVERVIEW
System Clock
The external clocks which are required to operate the AK4319A are XTI, LRCK, BICK. The master clock(XTI)
should be synchronized with LRCK but the phase is not critical. The XTI is used to operate the digital
interpolation filter and the delta-sigma modulator. The frequency of XTI is determined by the sampling rate
(LRCK) and CKS pin. Table 1 illustrates corresponding clock frequencies. When the 384fs is selected, the
internal master clock becomes 256fs(=384fs*2/3). Refer to Figure 1 .
The master clock can be either a crystal resonator placed across the XTI and XTO pin, or external clock input
to the XTI pin with the XTO pin left floating. Not only CMOS clock but sine wave signal with 1Vp-p can be input
to the XTI pin by AC coupling. Table 1 illustrates corresponding clock frequencies used in each speed. When
using internal oscillation, CLKO can not be used by external circuit at the power-down mode.
All external clocks(XTI,BICK,LRCK) should always be present whenever the AK4319A is in normal operation
mode(PD="H"). If these clocks are not provided, the AK4319A may draw excess current because the device
utilizes dynamic refreshed logic internally. The AK4319A should be reset by PD="L" after these clocks are
provided. If the external clocks are not present, the AK4319A should be in the power-down mode(PD="L").
After exiting reset at power-up etc., the AK4319A is in power-down mode until XTI and LRCK are input.
Clock
LRCK (fs)
frequency
8k 540kHz
64fs
BICK
CKS="L"
CKS="H"
256fs
MCLK
384fs
Table 1 . System Clocks
Figure 1 . Internal clock circuit
Figure 2 . X'tal resonator connection
M0011-E-01
1998/6
- 9 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
