ASAHI KASEI
[AK4319A]
PIN/FUNCTION
No.
1
2
3
4
5
6
7
Pin Name
DIF1
DVDD
DVSS
LRCK
BICK
SDATA
PD
I/O
I
-
-
I
I
I
I
Digital Input Format Pin
Digital Power Supply
Digital Ground Pin
L/R Clock Pin
Audio Serial Data Clock Pin
Function
(Internal Pull-down pin)
Audio Serial Data Input Pin
2's complement MSB-first data is input on this pin.
Power-Down Mode Pin
When at "L", the AK4319A is in power-down mode and is held in reset.
The AK4319A should always be reset upon power-up.
Master Clock Input Pin
A crystal can be connected between this pin and XTO, or an external
CMOS clock can be input on XTI.
Crystal Oscillator Output Pin
When an external clock is input, this pin should be left floating.
Clock Output Pin
The inverted XTI clock is output.
Soft Mute Pin
(Internal Pull-down pin)
When this pin goes "H", soft mute cycle is initiated.
When returning "L", the output mute releases.
De-emphasis Frequency Select Pin
De-emphasis Frequency Select Pin
Master Clock Select Pin
(Internal Pull-down pin)
"L": MCLK=256fs,"H": MCLK=384fs
Test Pin
(Internal Pull-down pin)
Must be left floating or tied to AVSS.
Rch Negative analog output pin
Rch Positive analog output pin
Lch Negative analog output pin
Lch Positive analog output pin
Voltage Reference Output Pin, 3.0V (typ, respects to AVSS)
Normally connected to AVSS with a 0.1uF ceramic capacitor in parallel
witha 10uF electrolytic capacitor.
Analog Power Supply Pin
Analog Ground pin
Zero Input Detect Pin
Digital Input Format Pin
(Internal Pull-down pin)
8
XTI
I
9
10
11
XTO
CLKO
SMUTE
O
O
I
12
13
14
15
16
17
18
19
20
DEM0
DEM1
CKS
TST
AOUTR-
AOUTR+
AOUTL-
AOUTL+
VREF
I
I
I
I
O
O
O
O
O
21
22
23
24
AVDD
AVSS
DZF
DIF0
-
-
O
I
Note: All input pins except pull-down pins should not be left floating.
M0011-E-01
-3-
1998/6
AKM [ ASAHI KASEI MICROSYSTEMS ]
