I
[AK4220]
SWITCHING CHARACTERISTICS
(Ta= -40∼85°C; AVDD = VVDD1-2 = 4.5∼5.5V, DVDD= 3.0∼3.6V, CL= 20pF)
Control Interface Timing (I2C Bus, Note: 20)
SCL Clock Frequency
fSCL
tBUF
-
400
-
-
-
-
-
-
-
0.3
0.3
-
50
400
kHz
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
ns
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low Time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup Time from SCL Rising
Rise Time of Both SDA and SCL Lines
Fall Time of Both SDA and SCL Lines
Setup Time for Stop Condition
1.3
0.6
1.3
0.6
0.6
0
0.1
-
-
tHD:STA
tLOW
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tR
(Note: 21)
tF
tSU:STO
tSP
Cb
0.6
0
-
Pulse Width of Spike Noise Suppressed by Input Filter
Capacitive load on bus
pF
Control Interface Timing (4-wire serial mode)
CCLK Period
tCCK
tCCKL
tCCKH
tCDS
tCDH
tCSW
tCSS
tCSH
tDCD
tCCZ
200
80
80
50
50
150
50
50
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CCLK Pulse Width Low
Pulse Width High
CDTI Setup Time
CDTI Hold Time
CSN “H” Time
CSN “↓” to CCLK “↑”
CCLK “↑” to CSN “↑”
CDTO Delay
45
70
CSN “↑” to CDTO Hi-Z
Power-down & Reset Timing
PDN Pulse Width
(Note: 21)
TPD
150
ns
Note: 20. I2C is a registered trademark of Philips Semiconductors.
Note: 21. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
Note: 22. The AK4220 should be reset by PDN pin = “L” upon power up.
MS0627-E-00
2007/05
- 11 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
