[AK4213]
DC CHARACTERISTICS
(Ta= -40~85°C; AVDD=PVDD=2.6 ∼ 3.6V; SVDD=2.6 ∼ 5.5V; TVDD=1.6 ∼ 3.6V)
Parameter
High-Level Input Voltage
Symbol
VIH
VIH
VIL
VIL
min
typ
max
-
-
Units
V
V
V
V
-
-
-
-
(2.2V ≤ TVDD ≤ 3.6V)
(1.6V ≤ TVDD < 2.2V)
(2.2V ≤ TVDD ≤ 3.6V)
(1.6V ≤ TVDD < 2.2V)
70%TVDD
80%TVDD
Low-Level Input Voltage
-
-
30%TVDD
20%TVDD
Low-Level Output Voltage
VOL
VOL
Iin
-
-
-
-
-
-
0.4
20%TVDD
±2
V
V
(2.0V ≤ TVDD ≤ 3.6V: Iout = 3mA)
(1.6V ≤ TVDD < 2.0V: Iout = 3mA)
Input Leakage Current
μA
SWITCHING CHARACTERISTICS
(Ta= -40~85°C; AVDD=PVDD =2.6 ∼ 3.6V; SVDD=2.6 ∼ 5.5V; TVDD=1.6 ∼ 3.6V)
Parameter
Symbol
min
typ
max
Units
Control Interface Timing: (Note 26)
SCL Clock Frequency
FSCL
tBUF
-
-
-
-
-
-
-
400
-
-
-
-
-
-
-
0.3
0.3
-
400
50
kHz
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
pF
ns
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low Time
1.3
0.6
1.3
0.6
0.6
0
0.1
-
-
tHD:STA
tLOW
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tR
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling (Note 27)
SDA Setup Time from SCL Rising
Rise Time of Both SDA and SCL Lines
Fall Time of Both SDA and SCL Lines
Setup Time for Stop Condition
-
-
-
-
tF
tSU:STO
Cb
0.6
-
0
Capacitive load on bus
Pulse Width of Spike Noise Suppressed by Input Filter
tSP
-
-
Power-down & Reset Timing
PDN Pulse Width
(Note 28)
tPD
150
-
ns
Note 26. I2C is a registered trademark of Philips Semiconductors.
Note 27. Data must be held long enough to bridge the 300ns-transition time of SCL.
Note 28. The PDN pin must change from “L” to “H” after all power supply pins are supplied. The AK4213 can be also
reset by bringing the PDN pin = “L” to “H”.
MS0949-E-01
- 10 -
2008/07
AKM [ ASAHI KASEI MICROSYSTEMS ]
