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AK4128A 参数 Datasheet PDF下载

AK4128A图片预览
型号: AK4128A
PDF下载: 下载PDF文件 查看货源
内容描述: 8CH 216kHz的/ 24位异步SRC [8ch 216kHz / 24-Bit Asynchronous SRC]
分类和应用:
文件页数/大小: 50 页 / 756 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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[AK4128A]
Function
Analog Power Supply Pin, 3.0
3.6V
Digital Power Output Pin, Typ 1.8V
When the PDN pin= “L”, the DV18 pin outputs “L”. Current must not be taken
from this pin. A 1μF (±30%; including the temperature characteristics) capacitor
61 VD18
O
should be connected between this pin and DVSS. When this capacitor is polarized,
the positive polarity pin should be connected to the VD18 pin.
62 VSS1
-
Analog Ground Pin
Test Pin.
63 TST3
I
This pin should be connected to VSS2-5.
Input Channel Clock #2 Pin
64 ILRCK2
I
When INAS pin = “L”, this pin should be connected to VSS2-5.
Note: All input pins should not be left floating. DVDD1-4 must be connected to the same power supply.
Note 1. SPB, CM2-0, INAS, PM2-1, OBIT1-0, TDM, ODIF1-0, IDIF2-0 and CAD0 pin must be changed when the PDN
pin= “L”.
Note 2. In parallel control mode (SPB pin = “L”), IDIF2-0 pins control all SRC1~4 audio interface input formats.
In serial control mode (SPB pin = “H”), the setting of IDIF2-0 pins is ignored. The IDIF[12:10] bits setting is
reflected to SRC1, the IDIF[22:20] bits setting is reflected to SRC2, the IDIF[32:30] bits setting is reflected to
SRC3, and the IDIF[42:40] bits setting is reflected to SRC4.
Note 3. In parallel control mode (SPB pin = “L”), the SMUTE pin controls all SRC1~4 soft mute.
In serial control mode (SPB pin = “H”), the SUMUTE pin setting is ignored. The SMUTE1 bit setting is
reflected to SRC1, the SMUTE2 bit setting is reflected to SRC2, the SMUTE3 bit setting is reflected to SRC3,
and the SMUTE4 bit setting is reflected to SRC4.
Note 4. In parallel control mode (SPB pin= “L”), DEM1-0 pins control all SRC1~4 de-emphasis settings.
In serial control mode (SPB pin= “H”), setting of DEM1-0 pins is ignored. DEM[11:10] bits setting is reflected
to SRC1, DEM[21:20] bits setting is reflected to SRC2, DEM[31:30] bits setting is reflected to SRC3, and
DEM[41:40] bits setting is reflected to SRC4.
No.
60
Pin Name
AVDD
I/O
-
Handling of Unused Pins
The unused I/O pins should be processed appropriately as below.
Classification
Pin Name
IBICK2, IMCLK, SDTI3-4, ILRCK3,
IBICK3, ILRCK4, IBICK4, SMUTE,
DITHER, OMCLK/XTI, ILRCK2,
SDA, SCL, CAD0, TST0-3
UNLOCK, SDTO1-4, MCKO, XTO
Setting
These pins must be connected to VSS2-5.
These pins must be open.
Digital
MS1242-E-00
-8-
2010/09