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AK4101A 参数 Datasheet PDF下载

AK4101A图片预览
型号: AK4101A
PDF下载: 下载PDF文件 查看货源
内容描述: QUAD产出192KHZ 24位DIT [QUAD OUTPUTS 192KHZ 24 BIT DIT]
分类和应用: 输出元件
文件页数/大小: 29 页 / 317 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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ASAHI KASEI
[AK4101A]
PIN/FUNCTION
No.
1
Pin Name
PDN
I/O
I
Function
Power Down & Reset Pin
(Pull-up Pin)
When “L”, the AK4101A is powered-down, TXP/N pins are “L” and the
control registers are reset to default values.
Master Clock Input Pin
Audio Serial Data Input 1 Pin
Audio Serial Data Input 2 Pin
(Pull-down Pin)
Audio Serial Data Input 3 Pin
(Pull-down Pin)
Audio Serial Data Input 4 Pin
(Pull-down Pin)
Power Supply Pin, 4.75V∼5.25V
Ground Pin, 0V
Audio Serial Data Clock Input/Output Pin
Serial Clock for SDTI pins which can be configured as an output based on
the DIF2-0 inputs.
Input/Output Channel Clock Pin
Indicates left or right channel, and can be configured as an output based on
the DIF2-0 inputs.
Sampling Frequency Select 0 Pin at Synchronous mode (Pull-down Pin)
Host Interface Chip Select Pin at Asynchronous mode (Pull-down Pin)
AK4112B Mode Pin at Audio routing mode
(Pull-down Pin)
0: Non-AKM receivers mode, 1: AK4112B mode
Sampling Frequency Select 1 Pin at Synchronous mode (Pull-down Pin)
Host Interface Data Input Pin at Asynchronous mode (Pull-down Pin)
Sampling Frequency Select 2 Pin at Synchronous mode (Pull-down Pin)
Host Interface Bit Clock Input Pin at Asynchronous mode (Pull-down Pin)
Sampling Frequency Select 3 Pin at Synchronous mode (Pull-down Pin)
Host Interface Data Output Pin at Asynchronous mode (Pull-down Pin)
Channel Status Bit Input Pin for Channel 1
Channel Status Bit Input Pin for Channel 2
(Pull-down Pin)
Channel Status Bit Input Pin for Channel 3
(Pull-down Pin)
Channel Status Bit Input Pin for Channel 4
(Pull-down Pin)
Asynchronous/Synchronous Mode Select Pin
(Pull-up Pin)
0: Asynchronous mode, 1: Synchronous mode
Block Start Input/Output Pin
(Pull-down Pin)
In normal mode, the channel status block output is “H” for the first four
bytes. In audio routing mode, the pin is configured as an input. When PDN
pin = “L”, BLS pin goes “H” at Normal mode.
Clock Mode Select 0 Pin
(Pull-up Pin)
Ground Pin, 0V
2
3
4
5
6
7
8
9
MCLK
SDTI1
SDTI2
SDTI3
SDTI4
VDD
VSS
BICK
I
I
I
I
I
-
-
I/O
10
LRCK
I/O
11
FS0
CSN
AKMODE
FS1
CDTI
FS2
CCLK
FS3
CDTO
C1
C2
C3
C4
ANS
BLS
I
I
I
I
I
I
I
I
O
I
I
I
I
I
I/O
12
13
14
15
16
17
18
19
20
21
22
CKS0
VSS
I
-
MS0250-E-00
-4-
2003/07