ASAHI KASEI
[AK2572]
Table 9-6 Register Configuration (Continued)
Register
Address
Function
Bit Form R/W
Note
Temperature equivalent value
(AD code of temperature sensor)
Temperature equivalent value at
just before Shutdown request
R_TEMP [7:0]
10h
8
8
U
U
R
R
Refer to Table 4-10
R_TEMP
Refer to Section 7.2 and
Table 4-10
14h
19h
_STDW [7:0]
1: Active, 0: Inactive
[4] TEMPALM
[3] EXTALM2
[2] EXTALM1
[1] CURRALM
[0] OPTALM
R_TXFLT_ST
[4:0]
Alarm status
5
U
R
R_DAC1 [7:0]
R_DAC2 [7:0]
R_DAC3 [7:0]
1Bh
1Ch
1Dh
I-DAC1 value
I-DAC2 value
V-DAC3 value
8
8
8
U
U
U
R
R
R
[*3]
[*3]
[*3]
[7]Sign of APC_FB [*2]
[6:0] Upper 7bits of APC_FB
001:Self-Operation Mode
010:Adjustment Mode
R_APC_FB [7:0] 1Eh
APC_FB value
Operation mode
For AKM test
8
S
R
R_MODE [2:0]
AKM test
1Fh
3
U
R
100:EEPROM Access Mode
28h~2Bh
2Eh
-
-
-
R_PWR
EEPROM data switching at
Power Leveling [2]
2Fh
2
U
R/FW
Refer to Table 5-2 [*1]
_SEL [1:0]
[*1] Finally modified value in either R_PWR_SEL [7:6] (R/W) at address “01h” or R_PWR_SEL [1:0] (R/FW) at
address “2Fh” becomes valid R_PWR_SEL set value and is updated and retained in R_PWR_SEL at both
address locations. And with R_PWR_LVL1_SET=“0” and R_PWR_LVL2_SET=“1”, Power Leveling[2] is
available and write in Self-Operation Mode can be executable only to R_PWR_SEL [1:0] (R/WF) at address
“2Fh” when Write Protect operation is released.
[*2] Data configuration is shown in Figure 9-9. Register is configured with the signed 9 bits data, but Read /
Write operation via Digital I/F is processed in 8 bits configuration.
[*3] In Bias current setting DAC and Modulation current setting DAC, Digital code for DAC is given as following
equation and negative value at R_DACx is set to “0”.
R_DACx=R_DACx_FF+R_DACx_FB (x=1 ~ 3)
Figure 9-9 Signed Register Configuration
Register (9 bits 2's complement)
Body (8 bits)
D4 D3
Sign
D8
D7
D6
D5
D2
D1
D0
Read data via Digital I/F (R_APC_FB)
(Sign + Body [MSB 7 bits])
Write data via Digital I/F (R_APC_FBIV)
(Body 8 bits, Negative value cannot be written
-42-
< MS0290-E-01>
2004/8