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AK2500B 参数 Datasheet PDF下载

AK2500B图片预览
型号: AK2500B
PDF下载: 下载PDF文件 查看货源
内容描述: DS3 / STS - 1模拟线路接收器 [DS3/STS-1 Analog Line Receiver]
分类和应用: 电信集成电路光电二极管异步传输模式ATM
文件页数/大小: 17 页 / 79 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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ASAHI KASEI
[AK2500B]
PIN DESCRIPTION
No.
1
Pin Name
IREF
I/O
O
Function
Current reference output determined by the external resister.
External resistance 4.9 kohm(+/-1%) should be connected between this pin and
VSSA.
Loss of Signal Threshold Control
The voltage forced on this pin controls the input loss-of-signal threshold. Three
settings are provided by forcing GND, VDD/2, or VDD at LOSTHR (see
Table
6).
Receive PLL Loss-of-Lock
Active High alarm. If the recovered clock frequency is larger than approximately
0.5% of EXCLK, RLOL alarm goes High.
Receive Input
Unbalanced analog receive input. The B3ZS receive signal is input to this pins.
Data and clock are recovered and output on RPDATA, RNDATA and RCLK.
Power Supply for the analog part.
+3.3 volts.
Active low RESET.
Pulled up to VDD with internal resister.
Bottom voltage reference level output.
An external capacitor (0.1uF±20%) should be connected between this pin and
VSSA.
Top voltage reference level output.
An external capacitor (0.1uF±20%) should be connected between this pin and
VSSA.
Ground for the analog part.
0 volts.
Ground for the digital part.
0 volts.
Receive Loss-of-Signal.
This pin is set high on loss of the incoming signal at RIN.
External Reference Clock.
A valid DS3 or STS-1 clock must be provided at this input. The duty cycle of
EXCLK, referenced to VDD/2 levels, must be 40% - 60%. The EXCLK
frequency determines the operating frequency of the device.
Power Supply for the digital part.
+3.3 volts
Power Supply for the analog part.
+3.3 volts.
Power Supply for the output buffer.
+3.3 volts.
Recovered Clock.
Receive Negative Data.
Receive Positive Data.
Ground for the output buffer.
0 volts.
Ground for the analog part.
0 volts.
Mode Control.
Equalizer enable/bypass mode, Test mode are selectable as shown in
Table 4.
2
LOSTHR
I
3
RLOL
O
4
5
6
7
8
RIN
VDDA
VDDA
RESET
BREF
I
-
-
I
O
9
10
11
12
TREF
VSSA
VSSD
RLOS
O
-
-
O
13
14
15
16
17
18
19
20
21
22
23
24
EXCLK
VDDD
VDDA
VDDC
RCLK
RNDATA
RPDATA
VSSC
VSSA
VSSA
MODE1
MODE2
I
-
-
-
O
O
O
-
-
-
I
I
MS0005-E-00
-4-
1999/12