[AK2331]
Block Functions
Block
Control
register
Channel
& address
decoder
8-bit Latch0 to
Latch3
8-bit DAC0 to DAC3
Buffer
Function
The control register inputs serial data (SDATA) consisting of a 4-bit address and
8-bit data in sync with the CSN and SCLK signals to set register data.
When a system reset is performed through the RSTN pin on power-up, all registers
are initialized. The same reset (soft reset) can also be made by the SRST register
(refer to register descriptions).
The channel & address decoder decodes the data set by the control register and
sets the corresponding D/A converter and reference voltage.
The 8-bit Latch0 to Latch3 store the register data of the control register.
The 8-bit DAC0 to DAC3 are 8-bit D/A converters set by the data latched in the
previous stage.
The buffer is a buffer amplifier that performs rail-to-rail operation.
MS0903-E-00
-4-
2008/03
AKM [ ASAHI KASEI MICROSYSTEMS ]
