[AK1548]
3. Analog Circuit Characteristics
The resistance of 27kΩ is connected to the [BIAS] pin.
VDD1=2.7V to 3.3V, VDD2=VDD1 to 5.5V,–40°C≤Ta≤85°C, unless otherwise specified.
Parameter
Min.
Typ.
Max.
Unit
Remarks
RF Characteristics
Input Sensitivity
Input Frequency
-5
1000
5
8000
dBm
MHz
REFIN Characteristics
Input Sensitivity
0.4
0.4
Input Frequency
Maximum Allowable Prescaler Output
Frequency
Phase Detector
Phase Detector Frequency
Charge Pump
Charge Pump Maximum Value
Charge Pump Minimum Value
Icp TRI-STATE Leak Current
Mismatch between Source and Sink Currents
(Note 1)
Icp vs. Vcpo (Note 2)
Regulator
VREF1 Rise Time
VREF2 Rise Time
10
10
Current Consumption
IDD1
IDD2
IDD3 (Note 4)
IDD4
16
0.8
0.55
10
26
1.6
0.9
μA
mA
mA
mA
[PDN]=“0”
[PDN]=”1”, {PD}=0, IDD for VDD1
[PDN]=”1”, {PD}=0, IDD for VDD2
[PDN]=”1”, {PD}=1, IDD for VDD1
ms
ms
Connect 470nF Capacitance at
VREF2 Pin
Connect 470nF Capacitance at
VREF2 Pin
5200
650
1
10
15
μA
μA
nA
%
%
0.7≤Vcpo≤VDD2-0.7, Ta=25°C
Vcpo : CP terminal voltage
Vcpo=VDD2/2, Ta=25°C
0.5≤Vcpo≤VDD2-0.5, Ta=25°C
104
MHz
10
VDD1
2
300
300
Vpp
Vpp
MHz
MHz
REFIN
≤200MHz
REFIN>200MHz
Note 1) Mismatch between Source and Sink Currents : [(|Isink|-|Isource|)/{(|Isink|+|Isource|)/2}] × 100 [%]
Note 2) See “Charge Pump Characteristics - Voltage vs. Current”. Vcpo is the output voltage at [CP].
Icp vs. Vcpo : [{1/2×(|I1|-|I2|)}/{1/2×(|I1|+|I2|)}]×100 [%]
MS1364-E-00
9
2012/1