[AK09915]
10. Serial Interface
AK09915 supports I2C bus interface and 4-wire SPI. A selection is made by CSB pin. When used as 3-wire
SPI, set SI pin and SO pin wired-OR externally.
CSB pin = “L”:
CSB pin = “H”:
4-wire SPI
I2C bus interface
10.1. 4-wire SPI
The 4-wire SPI consists of four digital signal lines: SK, SI, SO, and CSB, and is provided in 16bit protocol.
Data consists of Read/Write control bit (R/W), register address (7-bit) and control data (8-bit). To read out all
axes measurement data (X, Y, Z), an option to read out more than one byte data using automatic increment
command is available. (Sequential read operation)
CSB pin is low active. Input data is taken in on the rising edge of SK pin, and output data is changed on the
falling edge of SK pin. (SPI-mode3)
Communication starts when CSB pin transits to “L” and stops when CSB pin transits to “H”. SK pin must be
“H” during CSB pin is in transition. Also, it is prohibited to change SI pin during CSB pin is “H” and SK pin
is “H”.
10.1.1.Writing Data
Input 16 bits data on SI pin in synchronous with the 16-bit serial clock input on SK pin. Out of 16 bits input
data, the first 8-bit specify the R/W control bit (R/W = “0” when writing) and register address (7-bit), and the
latter 8-bit are control data (8-bit). When any of addresses listed on Table 11.1 is input, AK09915 recognizes
that it is selected and takes in latter 8-bit as setting data.
If the number of clock pulses is less than 16, no data is written. If the number of clock pulses is more than 16,
data after the 16th clock pulse on SI pin are ignored.
It is not compliant with serial write operation for multiple addresses.
CSB
1
2
3
4
5
6
7
8
9
10
11
12
13 14
15
16
D0
SK
SI
(INPUT)
RW A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
Hi-Z
SO
(OUTPUT)
Figure 10.1 4-wire SPI Writing Data
015006484-E-02
2016/7
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AKM [ ASAHI KASEI MICROSYSTEMS ]
