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A93C66M8VU 参数 Datasheet PDF下载

A93C66M8VU图片预览
型号: A93C66M8VU
PDF下载: 下载PDF文件 查看货源
内容描述: [THREE-WIRE SERIAL EEPROM]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 14 页 / 776 K
品牌: AITSEMI [ AiT Semiconductor ]
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A93C66  
AiT Semiconductor Inc.  
www.ait-ic.com  
THREE-WIRE SERIAL EEPROM  
4K (512 X 8 OR 256 X 16)  
DETAILED INFORMATION  
The A93C66 is accessed via a simple and versatile three-wire serial communication interface. Device  
operation is controlled by seven instructions issued by the host processor. A valid instruction starts with a  
rising edge of CS and consists of a start bit (logic“1”) followed by the appropriate OP Code and the desired  
memory address location.  
Instruction Set of A93C66  
Address  
Data  
OP  
Instruction  
SB  
Comments  
Code  
x8  
x16  
x8  
x16  
Reads data stored in memory,  
at specified address  
Write enable must precede all  
programming modes  
READ  
EWEN  
1
1
10  
00  
A8 - A0  
A7 - A0  
11XXXXXXX 11XXXXXX  
Erase memory location An - A0  
ERASE  
WRITE  
1
1
11  
01  
A8 - A0  
A8 - A0  
A7 - A0  
A7 - A0  
Writes memory location An - A0  
D7 - D0 D15 - D0  
Erases all memory locations.  
Valid only at VCC = 4.5V to 5.5V  
Writes all memory locations.  
Valid only at VCC = 4.5V to 5.5V  
Disables all programming  
instructions  
ERAL  
WRAL  
EWDS  
1
1
1
00  
00  
00  
10XXXXXXX 10XXXXXX  
01XXXXXXX 01XXXXXX D7 - D0 D15 - D0  
00XXXXXXX 00XXXXXX  
The X’s in the address field represent don’t care values and must be clocked.  
READ (READ)  
The Read (READ) instruction contains the address code for the memory location to be read. After the  
instruction and address are decoded, data from the selected memory location is available at the serial output  
pin DO. Output data changes are synchronized with the rising edges of serial clock SK. It should be noted that  
a dummy bit (logic “0”) precedes the 8- or 16-bit data output string. The A93C66 supports sequential read  
operations. The device will automatically increment the internal address pointer and clock out the next  
memory location as long as Chip Select (CS) is held high .In this case, the dummy bit (logic “0”) will not be  
clocked out between memory locations, thus allowing for a continuous steam of data to be read.  
ERASE/WRITE (EWEN):  
To assure data integrity, the part automatically goes into the Erase/Write Disable (EWDS) state when power  
is first applied. An Erase/Write Enable (EWEN) instruction must be executed first before any programming  
instructions can be carried out. Please note that once in the EWEN state, programming remains enabled until  
an EWDS instruction is executed or VCC power is removed from the part.  
REV1.0  
- MAY 2012 RELEASED -  
- 7 -