A93C46
AiT Semiconductor Inc.
www.ait-ic.com
THREE-WIRE SERIAL EEPROM
1K (128 X 8 OR 64 X 16)
ERASE (ERASE): The Erase (ERASE) instruction programs all bits in the specified memory location to the
logical “1”state. The self-timed erase cycle starts once the ERASE instruction and address are decoded. The
DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept low for a minimum of
250ns (TCS). A logic “1” at pin DO indicates that the selected memory location has been erased, and the part
is ready for another instruction.
WRITE (WRITE): The Write (WRITE) instruction contains the 8 or 16 bits of data to be written into the
specified memory location. The self-timed programming cycle, tWP, starts after the last bit of data is received
at serial data input pin DI. The DO pin outputs the Ready/Busy status of the part if CS is brought high after
being kept low for a minimum of 250ns (TCS). A logic “0” at DO indicates that programming is still in progress.
A logic “1” indicates that the memory location at the specified address has been written with the data pattern
contained in the instruction and the part is ready for further instructions. A Ready/Busy status cannot be
obtained if the CS is brought high after the end of the self timed programming cycle, TWP.
ERASE ALL (ERAL): The Erase All (ERAL) instruction programs every bit in the memory array to the logic “1”
state and is primarily used for testing purposes. The DO pin outputs the Ready/Busy status of the part if CS is
brought high after being kept low for a minimum of 250ns (TCS). The ERAL instruction is valid only at VCC
5.0V ± 10%.
=
WRITE ALL (WRAL): The Write All (WRAL) instruction programs all memory locations with the data patterns
specified in the instruction. The DO pin outputs the Ready/Busy status of the part if CS is brought high after
being kept low for a minimum of 250ns (TCS). The WRAL instruction is valid only at VCC = 5.0V ± 10%.
ERASE/WRITE DISABLE (EWDS): To protect against accidental data disturb, the Erase/Write Disable
(EWDS) instruction disables all programming modes and should be executed after all programming
operations. The operation of the Read instruction is independent of both the EWEN and EWDS instructions
and can be executed at any time.
REV1.2
- FEB 2010 RELEASED, FEB 2012 DATED -
- 8 -
AITSEMI [ AiT Semiconductor ]
