A7121A
DC-DC CONVERTER BUCK (STEP-DOWN)
1MHz, 2.0A, SYNCHRONOUS
AiT Semiconductor Inc.
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decreases. Caution must be exercised to ensure the heat dissipated not to exceed the maximum junction
temperature of the IC.
NOTE 5: The duty cycle D of a step-down converter is defined as:
VOUT
VIN
D = tON x f OSC x 100%≈
x 100%
Where tON is the main switch on time and f OSC is the oscillator frequency (1MHz).
Maximum Load Current
The A7121A will operate with input supply voltage as low as 2.7V, however, the maximum load current
decreases at lower input due to large I-R drop on the main switch and synchronous rectifier. The slope
compensation signal reduces the peak inductor current as a function of the duty cycle to prevent
sub-harmonic oscillations at duty cycles greater than 50%. Conversely the current limit increases as the duty
cycle decreases.
Layout Guidance
When laying out the PCB board, the following suggestions should be taken to ensure proper operation of the
A7121A. These items are also illustrated graphically in Figure 2(illustrated by A7121A-A).
1.
2.
3.
The power traces, including the GND trace, the LX trace and the VIN trace should be kept short, direct
and wide.
The VFB pin should be connected directly to the feedback resistor. The resistive divider R1/R2 must be
connected between the (+) plate of C3 and ground.
Connect the (+) plate of C1 to the VIN pin as closely as possible. This capacitor provides the AC current
to internal power MOSFET.
4.
Keep the switching node, LX, away from the sensitive VFB node.
Keep the (-) plates of C1 and C3 as close as possible.
5.
Figure 2. A7121A Suggested Layout
REV1.3
- JUL 2013 RELEASED, NOV 2016 UPDATED -
- 9 -
AITSEMI [ AiT Semiconductor ]
