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A7110E5VR-R 参数 Datasheet PDF下载

A7110E5VR-R图片预览
型号: A7110E5VR-R
PDF下载: 下载PDF文件 查看货源
内容描述: [DC-DC CONVERTER/ BUCK (STEP-DOWN)]
分类和应用: DC-DC转换器
文件页数/大小: 11 页 / 278 K
品牌: AITSEMI [ AiT Semiconductor ]
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A7110  
DC-DC CONVERTER/ BUCK (STEP-DOWN)  
1.0A 1.5MHz SYNCHRONOUS  
AiT Semiconductor Inc.  
www.ait-ic.com  
Soft-start  
A7110 has a internal soft-start circuitry to reduce supply inrush current during startup conditions. When the  
device exits under-voltage lockout (UVLO), shutdown mode, or restarts following a thermal-overload event,  
the l soft-start circuitry slowly ramps up current available at SW.  
UVLO and Thermal Shutdown  
If IN drops below 2.5V, the UVLO circuit inhibits switching. Once IN rises above 2.6V, the UVLO clears, and  
the soft-start sequence activates. Thermal-overload protection limits total power dissipation in the device.  
When the junction temperature exceeds TJ= +160°C, a thermal sensor forces the device into shutdown,  
allowing the die to cool. The thermal sensor turns the device on again after the junction temperature cools by  
15°C, resulting in a pulsed output during continuous overload conditions. Following a thermal-shutdown  
condition, the soft-start sequence begins.  
Design Procedure  
Setting Output Voltages  
Output voltages are set by external resistors. The FB_ threshold is 0.6V.  
RTOP = RBOTTOM[(VOUT / 0.6) - 1]  
Input Capacitor Selection  
The input capacitor in a DC-to-DC converter reduces current peaks drawn from the battery or other input  
power source and reduces switching noise in the controller. The impedance of the input capacitor at the  
switching frequency should be less than that of the input source so high-frequency switching currents do not  
pass through the input source. The output capacitor keeps output ripple small and ensures control-loop  
stability. The output capacitor must also have low impedance at the switching frequency. Ceramic, polymer,  
and tantalum capacitors are suitable, with ceramic exhibiting the lowest ESR and high-frequency impedance.  
Output ripple with a ceramic output capacitor is approximately as follows:  
V
RIPPLE = IL(PEAK)[1 / (2π x fOSC x COUT)]  
If the capacitor has significant ESR, the output ripple component due to capacitor ESR is as follows:  
RIPPLE(ESR) = IL(PEAK) x ESR  
V
Output Capacitor and Inductor Selection  
Follow the below table for Inductor and Output cap selection:  
VOUT 1.2V  
COUT 33µF 33µF 22µF 22µF 10µF  
1.5µH 1.5µH 2.2µH 3.3µH 4.7µH  
1.5V  
1.8V  
2.5V  
3.3V  
L
REV2.1  
- JAN 2009 RELEASED, MAY 2016 UPDATED -  
- 8 -