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A6318E5VR-ADJ 参数 Datasheet PDF下载

A6318E5VR-ADJ图片预览
型号: A6318E5VR-ADJ
PDF下载: 下载PDF文件 查看货源
内容描述: [REGULATOR CMOS LOW DROPOUT REGULATOR (LDO)]
分类和应用:
文件页数/大小: 13 页 / 683 K
品牌: AITSEMI [ AiT Semiconductor ]
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A6318  
REGULATOR CMOS LOW DROPOUT REGULATOR (LDO)  
300mA ULTRA-LOW NOISE, ULTRA-FAST  
AiT Semiconductor Inc.  
www.ait-ic.com  
Programming the A6318 Adjustable LDO regulator  
The output voltage of the A6318 adjustable regulator is programmed using an external resistor divider as  
show in Figure as below. The output voltage is calculated using equation as below:  
Where: VREF=1.23V typ. (the internal reference voltage) .Resistors R1 and R2 should be chosen for  
approximately 50uA divider current. Lower value resistors can be used for improved noise performance, but  
the solution consumes more power. Higher resistor values should be avoided as leakage current into/out of  
FB across R1/R2 creates an offset voltage that artificially increases/decreases the feedback voltage and thus  
erroneously decrease/increases VOUT. The recommended design procedure is to choose R2=30.1KΩ to set  
the divider current at 50uA, C1=22pF for stability, and then calculate using Equation as below:  
In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor  
be placed between OUT and FB. The suggested value of this capacitor for several resistor ratios is shown in  
the table below.  
OUTPUT VOLTAGE PROGRAMMING GUIDE  
OUTPUT VOLTAGTE  
R1  
R2  
C1  
1.8V  
2.5V  
3.3V  
3.6V  
13.9 KΩ  
31.6 KΩ  
51 KΩ  
59 KΩ  
30.1 KΩ  
30.1 KΩ  
30.1 KΩ  
30.1 KΩ  
22pF  
22pF  
22pF  
22pF  
A6318 Adjustable LDO regulator Programming  
REV2.1  
- JAN 2010 RELEASED, FEB 2014 UPDATED -  
- 9 -