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A24C64G4R 参数 Datasheet PDF下载

A24C64G4R图片预览
型号: A24C64G4R
PDF下载: 下载PDF文件 查看货源
内容描述: [MEMORY EEPROM TWO-WIRE SERIAL]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 20 页 / 1109 K
品牌: AITSEMI [ AiT Semiconductor ]
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A24C64  
MEMORY EEPROM  
AiT Semiconductor Inc.  
www.ait-ic.com  
64k BITS (8192 X 8) TWO-WIRE SERIAL  
same page. If more than 32 data words are transmitted to the EEPROM, the data word address will roll over”  
and previous data will be overwritten.  
WRITE IDENTIFICATION PAGE: The Identification Page (32 bytes) is an additional page which can be  
written and (Iater) permanently locked in Read-only mode. It is written by issuing the Write Identification Page  
instruction. This instruction uses the same protocol and format as Page Write (into memory array) except for  
the following differences:  
Device type identifier = 1011b  
MSB address bits B15/B6 are don't care except for address bit B10 which must be ‘0'.  
LSB address bits B5/B0 define the byte address inside the Identification page.  
If the Identification page is locked, the data bytes transferred during the Write Identification  
Page instruction are not acknowledged (NoAck)  
ACKNOWLEDGE POLLlNG: Once the internally timed write cycle has started and the EEPROM inputs are  
disabledacknowledge polling can be initiated. This involves sending a start condition followed by the device  
address word. The read/write bit is representative of the operation desired. Only if the internal write cycle has  
completed will the EEPROM respond with a "0"allowing the read or write sequence to continue  
5. Read Operations  
Read operations are initiated the same way as write operations with the exception that the read/write select  
bit in the device address word is set to “1”. There are three read operations: current address read, random  
address read and sequential read.  
CURRENT ADDRESS READ: The internal data word address counter maintains the last address accessed  
during the last read or write operation, incremented by one. This address stays valid between operations as  
long as the chip power is maintained. The address “roll over” during read is from the last byte of the last  
memory page to the first byte of the first page. The address “roll over” during write is from the last byte of the  
current page to the first byte of the same page. Once the device address with the read/write select bit set to  
“1” is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out.  
The microcontroller does not respond with an input “0” but does generate a following stop condition (see  
Figure 9 on page13).  
REV2.0  
- SEP 2008 RELEASED, NOV 2016 UPDATED -  
- 9 -