AT1731A
Preliminary Product Information
DC-DC Power IC for TFT Panel
forces the current through the inductor to ramp back down , transferring the energy stored in
the magnetic field to the output capacitor and load. To add higher flexibility to the selection
of external component values, the device uses external loop compensation.
Negative Charge-Pump Regulator
Negative charge-pump contains internal P-channel and N-channel MOSFETs to perform the
power transfer. The internal MOSFETs switch at a constant 600kHz (0.5x fOSC). The
charge-pump inverts the supply voltage (VDDN) and provides a regulated negative output
voltage. Figure 3 shows charge-pump block diagram. During the first half-cycle, the
P-channel MOSFET turns on and flying capacitor CCPN charges to VDDN minus a diode drop.
During the second half-cycle, the P-channel MOSFET turns off, and the N-channel MOSFET
turns on, level shifting CCPN. This connects CCPN in parallel with the reservoir capacitor CNEG
.
If the voltage across CNEG minus a diode drop is lower than the voltage across CCPN, charge
flows from CCPN to CNEG until the diode turns off. The amount of charge transferred to the
output is controlled by the variable N-channel on-resistance.
Positive Charge-Pump Regulator
Positive charge-pump also contains internal P-channel and N-channel MOSFETs to perform
the power transfer. The internal MOSFETs switch at a constant 600kHz (0.5x fOSC). The
charge-pump inverts the doubles supply voltage (VDDP) and provides a regulated positive
output voltage. During the first half-cycle, the N-channel MOSFET turns on and flying
capacitor CCPP charges to VDDP minus a diode drop. During the second half-cycle, the
N-channel MOSFET turns off, and the P-channel MOSFET turns on, level shifting CCPP by
VDDP volts. This connects CCPP in series with the reservoir capacitor CPOS. If the voltage
across CPOS plus a diode drop is lower than the level shifted flying capacitor voltage
(VCPP+VDDP), charge flows from CCPP to CPOS until the diode turns off. The amount of charge
transferred to the output is controlled by the variable N-channel on-resistance.
Vmain
VDDP
VDDN
V
DDP
Cout
Cout
Driver
Driver
CCPN
SWN
SWP
FBP
Switch
Block
CCPP
V
POS
VNEG
R3
CPOS
CNEG
R10
FBN
R11
1.23V
R4
VPOS
=(1+R3/R4)x
VREF
V
REF =1.23V
1.23V
V
REF
V
NEG = -(R10/R11)xVREF
VREF
=1.23V
7F, No.9,PARK AVENUE. II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C.
Tel: 886-3-563-0878
2/8/2006 REV:1.1
Fax: 886-3-563-0879
WWW: http://www.aimtron.com.tw
Email: service@aimtron.com.tw
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AIMTRON [ AIMTRON TECHNOLOGY ]
