AIC1650
PIN DESCRIPTIONS
ꢀ
PIN 1: VIN - 4V to 20V input supply voltage.
PIN 6: DLOW - Driver sinking output. Connected
to DHI when using an external
P-channel MOSFET. When us-
ing an external PNP bipolar
transistor, connect a resistor RB
from this pin to DHI. RB value
depends on VIN, inductor and
PNP bipolar transistor. By ad-
justing the RB value, efficiency
can be optimized.
PIN 2: VREF - 1.22V reference output. Bypass
with a 0.047µF capacitor to GND.
Sourcing capability is guaran-
teed to be greater than 250µA.
PIN 3: SHDN- Logic input to shutdown the chip.
>1.5V = normal operation,
GND = shutdown
In shutdown mode DLOW and
DHI pins are at high level.
PIN 7: DHI - Driver sourcing output. Connect
to gate of the external P-channel
MOSFET or base of the PNP bi-
polar transistor.
PIN 4: FB
- Feedback signal input to sense
ground. Connecting a resistor
R1 to VOUT and a resistor R2 to
VREF pin yields the output volt-
age:
PIN 8: CL
- Current-limit input. This pin
clamps the switch peak current
to prevent over-current damage
to the external switch.
VOUT = -(R1/R2 ) x VREF
PIN 5: GND - Power ground.
APPLICATION INFORMATIONS
ꢀ
Max. Output Power vs VIN
The typical application circuit generates an adjustable
negative voltage for contrast bias of LCD displays.
Efficiency and output power can be optimized by us-
ing appropriate inductor and switch. The following
formulas provide a guideline for determining the op-
1.8
Typical Application Circuit
1.6
100µH
1.4
120µH
1.2
150µH
1
µ
180 H
0.8
0.6
0.4
0.2
0
timal component values:
µ
220 H
270µH
VIN
L
= (11.1− 0.15 × VIN) ×
IOUT × VOUT
VCEO > VIN + VOUT
IOUT
300µH
330µH
PNP :
Inductor Value
4
6
8
10
12
VIN (V)
14
16
18
20
IC,MAX ≥ 200 ×
VIN
IOUT
VIN
VCE < 0.4V at I C = 200 ×
and β = 10
RB ≅ 3 x L x (VIN - 0.8)
where, units: VIN & VOUT in V, IOUT in A, L in µH,
RB in Ω
4
AIC [ ANALOG INTERGRATIONS CORPORATION ]
