Input
3
1
V
ref
4
2
Output
& Vd
Figure 4. Gate Bias Method.
The DC supply at the input
terminal (V
ref
) can be applied
through a RF choke (inductor).
The voltage at V
ref
(Pin 3) with
respect to ground determines the
device current, I
d
. A plot of typical
I
d
vs. V
ref
is shown in Figure 5.
Maximum device current
(approximately 60 mA) occurs at
V
ref
= 0 (i.e. V
gs
= 0).
When using the gate biasing
method, the bypass mode is
activated when V
ds
= 0V and
V
ref
< -2V.
70
60
50
The current of the amplifier (I
d
) is
set by the value of the resistor
R
bias
. This resistor (R
bias
) is
connected at Pin 4 as shown in
Figure 6 and RF bypassed. At least
two capacitors in parallel are
recommended for RF bypassing.
One capacitor (100 pF) for high
frequency bypassing and a second,
large value capacitor for better
low frequency bypassing. The
large value capacitor is added in
parallel to improve the IP3
because they help ground the low
frequency mixing terms that are
generated during a two tones test
(i.e.
f
1
–
f
2
term which is the
separation of the two tones
usually 1 to a few MHz) and thus
improve the IIP3.
Input
3
1
The approximate value of the
external resistor, R
bias
, may also
be calculated from:
R
bias
= 964 (1 – 0.112
√
I
d
)
I
d
where R
bias
is in ohms and I
d
is the
desired device current in mA.
A simple method for DC ground-
ing the input terminal (Pin 3) is to
use a shunt inductor that is also
part of the noise-matching
network.
Adaptive Biasing
For applications in which input
power levels vary over a wide
range, it may be useful to dynami-
cally adapt the bias of the
MGA-71543 to match the signal
level. A sensor senses the signal
level at some point in the system
(usually in the baseband circuitry)
and automatically adjusts the bias
current of the amplifier accord-
ingly. The main advantage of
adaptive biasing is conservation of
supply current (longer battery life)
by using only the amount of
current necessary to handle the
input signal without distortion.
Adaptive biasing of the
MGA-71543 can be accomplished
by simple digital means (Figure 8).
For instance simple electronic
switches can be used to control
the value of the source resistor in
discrete increment.
71
71
4
2
Output
& Vd
Rbias
I
d
(mA)
40
30
20
10
0
-1
-0.8
-0.6
V
ref
(V)
-0.4
-0.2
Figure 6. Source Resistor Bias Method.
Maximum current (about 60 mA)
occurs when R
bias
= 0.
A plot of typical I
d
vs. R
bias
is
shown in Figure 7.
60
50
Figure 5. Device Current vs. V
ref
.
This kind of biasing would not
usually be used unless a negative
supply voltage was readily
available.
Source Resistor Bias
This is the recommended method
because it only requires one
(positive) power supply. As shown
in Figure 6, Pin 3 is DC grounded
and pins 1 and 4 are RF bypassed.
40
I
d
(mA)
30
3
20
10
0
0
20
40
60
80
100
120
140
R
bias
(Ω)
2
1
4
DC
Return
Path
Figure 7. Device Current vs. R
bias
.
Digital
Control
Figure 8. Adaptive Bias Control using Digital
Method.
15
AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
