Table 1 - HPMX-5001 Pin Description
No.
1
3
4
5
6
7
8
10
11, 15
12
14
16
17
20
21
22
23
26
27
28
30
31
32
2, 9, 13,
18,19,24,
25, 29
Mnemonic
TXCTRL
RXIFB
RXIF
TXIF
TXIFB
LNAREF
RXRF
TXRXVCC
TXRXGND
TXRFB
TXRF
DBLVCC
DBLGND
VCOTNKS
VCOTNKF
VCOVCC
VCOGND
DIVVCC
DIVGND
DIV
DIVMC
LOCTRL
RXCTRL
VSUB
I/O Type
CMOS I/P
Analog O/P
Analog O/P
Analog I/P
Analog I/P
Analog DC I/P
Analog I/P
DC Supply
Ground
Analog O/P
Analog O/P
DC Supply
Ground
Analog I/P
Analog O/P
DC Supply
Ground
DC Supply
Ground
Analog O/P
CMOS I/P
CMOS I/P
CMOS I/P
Ground
Description
Controls biasing of transmit mixer, amplifiers, and doubler
Inverted single-ended downconverted receiver output,
normally tied to V
CC
(internal 750
Ω
resistor connects to RXIF)
Single-ended downconverted receiver output, drives SAW
filter (internal 750
Ω
resistor connects to RXIFB)
Transmit non-inverting IF input
Transmit inverting IF input
Reference input for receive input amplifier
Receive RF input
Supply voltage for transmit path, receive front-end and mixer
Ground for transmit path, receive front-end and mixer
Inverting output of transmit path (see test diagram for
matching network)
Non-inverting output of transmit path (see test diagram for
matching network)
Supply voltage for LO frequency doubler
Ground for LO frequency doubler
Sense line from external tank circuit to on-chip VCO amplifier
Force line from on-chip VCO amplifier to external tank circuit
Supply voltage for on-chip VCO amplifier
Ground for on-chip VCO amplifier
Supply voltage for 32/33 dual-modulus prescaler
Ground for 32/33 dual-modulus prescaler
Output from 32/33 dual-modulus prescaler
Modulus control signal for 32/33 dual-modulus prescaler
Controls biasing for VCO and 32/33 dual modulus prescaler
Controls biasing for receive mixer, amplifiers, and doubler
Substrate bias voltage
Table 2 - HPMX-5001 Mode Control
(CMOS Logic Levels - all pins internally pulled up to high level)
Mode
Transmit
Receive
Synth
Standby
TXCTRL
0
1
1
1
RXCTRL
1
0
1
1
LOCTRL
0
0
0
1
7-93
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