HPMX-2005 Using Offsets
to Improve LO Leakage
It is possible to improve on the
excellent performance of the
HPMX-2005 for applications that
are particularly sensitive to LO
leakage. The amount and nature
of the improvement are best un-
derstood by examining figures 28
and 29, below.
LO leakage results when normal
variations in the wafer fabrication
process cause small shifts in the
values of the modulator IC’s inter-
nal components. These random
variations create an effect equiva-
lent to slight DC imbalances at the
input of each (I and Q) mixer. The
DC imbalances at the mixer in-
puts are multiplied by
±
1 at the
LO frequency and show up at the
output of the IC as LO leakage.
It is possible to externally apply
small DC signals to the I and Q in-
puts and exactly cancel the inter-
nally generated DC offsets. This
will result in sharply decreased
LO leakage at precisely the fre-
quency and temperature where
the offsets were applied (see fig-
ure 28).
This improvement is not very
useful if it doesn’t hold up over
frequency and temperature
changes. The lower curve in figure
28 shows how the offset-adjusted
LO leakage varies versus
frequency. Note that it remains
below -60 dBm over most of the
frequency range shown. In the
20 MHz range centered at
100 MHz, the level is closer to
-70 dBm.
Figure 29 shows the performance
of the offset adjusted LO leakage
over temperature. Note that the
adjusted curve is at a level near -
70 dBm over the entire tempera-
ture range.
The net result of using exter-
nally applied offsets with the
HPMX-2005 is that an LO
leakage level below -50 dBm
can typically be achieved over
both frequency and
temperature.
The magnitude of the required ex-
ternal offset varies randomly from
part to part and between the I and
Q mixers on any given IC. Offsets
can range from -35 mV to +35 mV.
External offsets may be applied
either by varying the average level
of the I and Q modulating signals,
or by varying the voltages at the
I
ref
and Q
ref
pins of the modulator.
0
0
P
OUT
-20
-20
LO LEAKAGE (dBm)
-40
NO OFFSETS
POWER (dBm)
-40
P
LO
-60
-60
-80
WITH OFFSETS
-100
0
50
100
FREQUENCY (MHz)
150
200
P
LO
(OFFSET)
-80
-55
-35
-15
5
25
45
65
85
TEMPERATURE (°C)
Figure 28. LO Leakage vs. Frequency
Without DC Offsets and LO Leakage
vs. Frequency with DC Offsets
Adjusted for Minimum LO Leakage at
100 MHz. V
CC
= 5 V, LO = -12 dBm,
V
Iref
= V
Qref
= 2.5 V, T
A
= 25
°
C.
Figure 29. LO Leakage with No DC
Offsets at 100 MHz vs. Temperature
(Upper Curve) and LO Leakage with
DC Offsets Adjusted for Minimum
Leakage at 25
°
C vs. Temperature
(Lower Curve). V
CC
= 5 V,
LO = -12 dBm, V
Iref
= V
Qref
= 2.5 V.
7-62
AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
