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HFBR-5905 参数 Datasheet PDF下载

HFBR-5905图片预览
型号: HFBR-5905
PDF下载: 下载PDF文件 查看货源
内容描述: ATM多模光纤收发器, 2× 5封装形式 [ATM Multimode Fiber Transceivers in 2 x 5 Package Style]
分类和应用: 光纤电信集成电路异步传输模式ATM
文件页数/大小: 15 页 / 279 K
品牌: AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
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Solder and Wash Process  
Compatibility  
Board Layout - Decoupling Circuit,  
Ground Planes and Termination  
Circuits  
It is important to take care in  
the layout of your circuit board  
to achieve optimum perform-  
ance from these transceivers.  
Figure 7 provides a good  
example of a schematic for a  
power supply decoupling circuit  
Board Layout - Hole Pattern  
The Agilent transceiver complies  
with the circuit board “Common  
Transceiver Footprint” hole  
pattern defined in the original  
multisource announcement  
which defined the 2 x 5 package  
style. This drawing is repro-  
duced in Figure 9 with the  
addition of  
The transceivers are delivered  
with protective process plugs  
inserted into the MT-RJ  
receptacle. This process plug  
protects the optical  
subassemblies during wave  
solder and aqueous wash  
processing and acts as a dust  
cover during shipping.  
that works well with these parts. ANSI Y14.5M compliant  
It is further recommended that a dimensioning to be used as a  
These transceivers are compat-  
ible with either industry  
standard wave or hand solder  
processes.  
contiguous ground plane be  
provided in the circuit board  
directly under the transceiver to  
provide a low inductance  
ground for signal return current.  
This recommendation is in  
keeping with good high  
guide in the mechanical layout  
of your circuit board.  
Shipping Container  
The transceiver is packaged in a  
shipping container designed to  
protect it from mechanical and  
ESD damage during shipment or  
storage.  
frequency board layout  
practices. Figures 7 and 8 show  
two recommended termination  
schemes.  
TERMINATE AT  
TRANSCEIVER INPUTS  
PHY DEVICE  
VCC (+3.3 V)  
VCC (+3.3 V)  
10 nF  
130 Ω  
130 Ω  
Z = 50 Ω  
TD-  
LVPECL  
Z = 50 Ω  
TD+  
82 Ω  
82 Ω  
10  
9
8
7
6
VCC (+3.3 V)  
VCC (+3.3 V)  
10 µF  
1 µH  
C2  
TX  
VCC (+3.3 V)  
10 nF  
C3  
RX  
130 Ω  
130 Ω  
RD+  
RD-  
1 µH  
C1  
1
2
3
4
5
LVPECL  
Z = 50 Ω  
Z = 50 Ω  
Z = 50 Ω  
VCC (+3.3 V)  
82 Ω  
82 Ω  
10 nF  
130 Ω  
82 Ω  
SD  
TERMINATE AT DEVICE INPUTS  
Note: C1 = C2 = C3 = 10 nF or 100 nF  
Figure ꢀ. Alternative Termination Circuits  
7