FDDI PMD and LCF-PMD
standards without violating the
worst case output electrical jitter
allowed in the Tables E1 of the
Annexes E.
The jitter specifications stated in
the following 1300 nm
transceiver specification tables
are derived from the values in
Tables E1 of Annexes E. They
represent the worst case jitter
contribution that the transceivers
are allowed to make to the overall
system jitter without violating the
Annex E allocation example. In
practice the typical contribution
of the HP transceivers is well
below these maximum allowed
amounts.
Recommended Handling
Precautions
Hewlett-Packard recommends
that normal static precautions be
taken in the handling and
assembly of these transceivers to
prevent damage which may be
induced by electrostatic
discharge (ESD). The HFBR-
5100 series of transceivers meet
MIL-STD-883C Method 3015.4
Class 2 products.
Care should be used to avoid
shorting the receiver data or
signal detect outputs directly to
ground without proper current
limiting impedance.
Solder and Wash Process
Compatibility
The transceivers are delivered
with protective process plugs
inserted into the duplex SC or
duplex ST connector receptacle.
This process plug protects the
optical subassemblies during
wave solder and aqueous wash
processing and acts as a dust
cover during shipping.
These transceivers are compat-
ible with either industry standard
wave or hand solder processes.
Shipping Container
The transceiver is packaged in a
shipping container designed to
protect it from mechanical and
ESD damage during shipment or
storage.
, ,
,
,,
,
NO INTERNAL CONNECTION
NO INTERNAL CONNECTION
HFBR-510X
TOP VIEW
Rx
V
EE
1
RD
2
RD
3
SD
4
Rx
V
CC
5
Tx
V
CC
6
TD
7
TD
8
Tx
V
EE
9
C1
C2
V
CC
TERMINATION
AT PHY
DEVICE
INPUTS
L1
L2
R2
R3
V
CC
C3
C4
R1
R4
R5
R7
C5
C6
R6
R8
R9
V
CC
FILTER
AT V
CC
PINS
TRANSCEIVER
Board Layout - Decoupling
Circuit and Ground Planes
It is important to take care in the
layout of your circuit board to
achieve optimum performance
from these transceivers. Figure 7
provides a good example of a
schematic for a power supply
decoupling circuit that works well
with these parts. It is further
recommended that a contiguous
R10
TERMINATION
AT TRANSCEIVER
INPUTS
RD
RD
SD
V
CC
TD
TD
NOTES:
THE SPLIT-LOAD TERMINATIONS FOR ECL SIGNALS NEED TO BE LOCATED AT THE INPUT
OF DEVICES RECEIVING THOSE ECL SIGNALS. RECOMMEND 4-LAYER PRINTED CIRCUIT
BOARD WITH 50 OHM MICROSTRIP SIGNAL PATHS BE USED.
R1 = R4 = R6 = R8 = R10 = 130 OHMS.
R2 = R3 = R5 = R7 = R9 = 82 OHMS.
C1 = C2 = C3 = C5 = C6 = 0.1 µF.
C4 = 10 µF.
L1 = L2 = 1 µH COIL OR FERRITE INDUCTOR.
Figure 7. Recommended Decoupling and Termination Circuits
132
AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
