欢迎访问ic37.com |
会员登录 免费注册
发布采购

HDMP-0450 参数 Datasheet PDF下载

HDMP-0450图片预览
型号: HDMP-0450
PDF下载: 下载PDF文件 查看货源
内容描述: 四端口旁路电路的光纤通道仲裁环 [Quad Port Bypass Circuit for Fibre Channel Arbitrated Loops]
分类和应用: 光纤电信集成电路电信电路
文件页数/大小: 10 页 / 272 K
品牌: AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
 浏览型号HDMP-0450的Datasheet PDF文件第2页浏览型号HDMP-0450的Datasheet PDF文件第3页浏览型号HDMP-0450的Datasheet PDF文件第4页浏览型号HDMP-0450的Datasheet PDF文件第5页浏览型号HDMP-0450的Datasheet PDF文件第6页浏览型号HDMP-0450的Datasheet PDF文件第7页浏览型号HDMP-0450的Datasheet PDF文件第8页浏览型号HDMP-0450的Datasheet PDF文件第9页  
Agilent HDMP-0450
Quad Port Bypass Circuit
for Fibre Channel Arbitrated Loops
Data Sheet
Features
• Supports 1.0625 GBd Fibre Channel
operation
Description
The HDMP-0450 is a Quad Port
Bypass Circuit (PBC) which
provides a low-cost, low-power
physical-layer solution for Fibre
Channel Arbitrated Loop (FC-AL)
disk array configurations. By using a
PBC such as the HDMP-0450, hard
disks may be pulled out or swapped
while other disks in the array are
available to the system.
A PBC consists of multiple 2:1
multiplexers daisy chained together.
Each port has two modes of
operation: “disk in loop” and “disk
bypassed.” When the “disk in loop”
mode is selected, the loop goes into
and out of the disk drive at that
port. For example, data goes from
the HDMP-0450’s TO_NODE[n]±
differential output pins to the Disk
Drive Transceiver IC’s (e.g., an
HDMP-1636A) Rx differential input
pins. Data from the Disk Drive
Transceiver IC’s Tx differential
outputs goes to the HDMP-0450’s
FM_NODE[n]± differential input
pins. Figure 2 shows connection
diagrams for disk drive array
applications. When the “disk
bypassed” mode is selected, the
disk drive is either absent or
nonfunctional and the loop
bypasses the hard disk.
The “disk bypassed” mode is
enabled by pulling the BYPASS[n]-
pin low. Leave BYPASS[n]-
floating to enable the “disk in
loop” mode. HDMP-0450s may be
cascaded with other members of
the HDMP-04XX/HDMP-05XX
family through the appropriate
FM_NODE[n]± and
TO_NODE[n]± pins to
accommodate any number of hard
disks (see Figure 3). The unused
cells in the HDMP-0450 may be
bypassed by using pulldown
resistors on the BYPASS[n]- pins
for these cells.
An HDMP-0450 may also be
configured as five 1:1 buffers, as
two 2:1 multiplexers, or as two
1:2 buffers.
• Supports 1.25 GBd Gigabit Ethernet
(GE) operation
• Quad PBC in one package
• Signal detect on FM_NODE[0] input
• Equalizers on all inputs
• High speed LVPECL I/O
• Buffered Line Logic (BLL) outputs
(no external bias resistors required)
• 0.5 W typical power at V
CC
= 3.3 V
• 44 Pin, 10 mm, low-cost plastic QFP
package
Applications
• RAID, JBOD, BTS cabinets
• Two 2:1 muxes
• Two 1:2 buffers
• 1 => N gigabit serial buffer
• N => 1 gigabit serial mux
HDMP-0450
CAUTION:
As with all semiconductor ICs, it is advised that normal static precautions be taken in the handling
and assembly of this component to prevent damage and/or degradation which may be induced by electrostatic
discharge (ESD).