欢迎访问ic37.com |
会员登录 免费注册
发布采购

HDMP-0422 参数 Datasheet PDF下载

HDMP-0422图片预览
型号: HDMP-0422
PDF下载: 下载PDF文件 查看货源
内容描述: 单端口旁路电路的CDR和数据有效检测能力的光纤通道仲裁环 [Single Port Bypass Circuit with CDR & Data Valid Detection Capability for Fibre Channel Arbitrated Loops]
分类和应用: 光纤电信集成电路电信电路光电二极管
文件页数/大小: 14 页 / 231 K
品牌: AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
 浏览型号HDMP-0422的Datasheet PDF文件第2页浏览型号HDMP-0422的Datasheet PDF文件第3页浏览型号HDMP-0422的Datasheet PDF文件第4页浏览型号HDMP-0422的Datasheet PDF文件第5页浏览型号HDMP-0422的Datasheet PDF文件第6页浏览型号HDMP-0422的Datasheet PDF文件第7页浏览型号HDMP-0422的Datasheet PDF文件第8页浏览型号HDMP-0422的Datasheet PDF文件第9页  
Agilent HDMP-0422
Single Port Bypass Circuit with CDR &
Data Valid Detection Capability
for Fibre Channel Arbitrated Loops
Data Sheet
Features
• Supports 1.0625 GBd Fibre
Channel operation
• Supports 1.25 GBd Gigabit
Ethernet (GE) operation
• Single PBC/CDR in one package
• CDR location determined by
choice of cable input/output
• Amplitude valid and data valid
detection (Fibre channel rate only)
on FM_NODE[0] input
• Equalizers on all inputs
• High-speed LVPECL I/O
• Buffered Line Logic (BLL) outputs
(no external bias resistors
required)
• 0.46 W typical power at
V
CC
= 3.3 V
• 24 Pin, low-cost SSOP package
Applications
• RAID, JBOD, BTS cabinets
• One 2:1 muxes
• One 1:2 buffers
• 1
N Gigabit serial buffer
• N
1 Gigabit serial mux
Description
The HDMP-0422 is a Single Port
Bypass Circuit (PBC) with Clock
and Data Recovery (CDR)
capability included. This integrated
circuit provides a low-cost, low-
power physical-layer solution for
Fibre Channel Arbitrated Loop
(FC-AL) disk array configurations.
By using a PBC such as the HDMP-
0422, hard disks may be pulled out
or swapped while other disks in the
array are available to the system.
A PBC consists of multiple 2:1
multiplexers daisy chained along
with a CDR. Each port has two
modes of operation: “disk in loop”
and “disk bypassed.” When the
“disk in loop” mode is selected, the
loop goes into and out of the disk
drive at that port. For example,
data goes from the HDMP-0422’s
TO_NODE[n]± differential output
pins to the Disk Drive Transceiver
IC’s (e.g. an HDMP-1636A) Rx
differential input pins. Data from
the Disk Drive Transceiver IC’s Tx
differential outputs goes to the
HDMP-0422’s FM_NODE[n]±
differential input pins. Figures 2
and 3 show connection diagrams
for disk drive array applications.
When the “disk bypassed” mode is
selected, the disk drive is either
absent or non-functional and the
loop bypasses the hard disk.
The “disk bypassed” mode is
enabled by pulling the BYPASS[n]-
pin low. Leave BYPASS[n]-
floating to enable the “disk in
loop” mode. HDMP-0422s may be
cascaded with other members of
the HDMP-04XX/HDMP-05XX
family through the appropriate
FM_NODE[n]± and
TO_NODE[n]± pins to
accommodate any number of hard
disks (see Figure 4). The unused
cells in the HDMP-0422 may be
bypassed by using pulldown
resistors on the BYPASS[n]- pins
for these cells.
An HDMP-0422 may also be used
as two 1:1 buffers, one with a CDR
and one without. For example, an
HDMP-0422 may be placed in
front of a CMOS ASIC to clean the
jitter of the outgoing signal (CDR
path) and to better read the
incoming signal (non-CDR paths).
In addition, the HDMP-0422 may
be configured as one 2:1
multiplexers or as one 1:2 buffers.
HDMP-0422
CAUTION:
As with all semiconductor ICs, it is advised that normal static precautionsb be taken in
the handling and assembly of this component to prevent damage and/or degradation which may be
induced by electrostatic discharge (ESD).