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HCPL4506 参数 Datasheet PDF下载

HCPL4506图片预览
型号: HCPL4506
PDF下载: 下载PDF文件 查看货源
内容描述: 智能功率模块和门驱动接口光电耦合器 [Intelligent Power Module and Gate Drive Interface Optocouplers]
分类和应用: 光电驱动
文件页数/大小: 14 页 / 267 K
品牌: AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
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I
LED1  
Q1 OFF  
Q2 ON  
Q1 ON  
I
V
V
LED1  
OUT1  
OUT2  
Q2 OFF  
Q1 OFF  
Q2 ON  
Q1 ON  
V
V
OUT1  
OUT2  
I
LED2  
Q2 OFF  
t
PLH  
MIN.  
t
PLH  
MAX.  
I
LED2  
t
PHL  
PDD*  
MAX.  
t
PLH MAX.  
MIN.  
t
t
PHL  
PHL  
MIN.  
MAX.  
MAX.  
DEAD TIME  
PDD* MAX. =  
(t  
t
)
t
t
PLH- PHL MAX. = PLH MAX. - PHL MIN.  
MAXIMUM DEAD TIME (DUE TO OPTOCOUPLER)  
*PDD = PROPAGATION DELAY DIFFERENCE  
= (t  
= (t  
t
t
) + (t  
) - (t  
t
)
PLH MAX.  
-
-
PLH MIN.  
PHL MAX.  
-
t
PHL MIN.  
)
PLH MAX.  
PHL MIN.  
PLH MIN.  
-
PHL MAX.  
NOTE: THE PROPAGATION DELAYS USED TO CALCULATE  
PDD ARE TAKEN AT EQUAL TEMPERATURES.  
= PDD* MAX. - PDD* MIN.  
*PDD = PROPAGATION DELAY DIFFERENCE  
Figure 29. Minimum LED Skew for Zero Dead Time.  
NOTE: THE PROPAGATION DELAYS USED TO CALCULATE THE MAXIMUM  
DEAD TIME ARE TAKEN AT EQUAL TEMPERATURES.  
Figure 30. Waveforms for Dead Time Calculation.  
(Figure 19), can achieve 15 kV/µs  
CMR while minimizing component  
complexity. Note that a CMOS  
gate is recommended in Figure 19  
to keep the LED off when the gate  
is in the high state.  
achieved by overdriving the LED  
current beyond the input  
LED Drive Circuit  
Considerations for Ultra  
High CMR Performance  
threshold so that it is not pulled  
below the threshold during a  
transient. The recommended  
minimum LED current of 10 mA  
provides adequate margin over  
the maximum ITH of 5.0 mA (see  
Figure 5) to achieve 15 kV/µs  
CMR. Capacitive coupling is  
higher when the internal load  
Without a detector shield, the  
dominant cause of optocoupler  
CMR failure is capacitive coupling  
from the input side of the opto-  
coupler, through the package, to  
the detector IC as shown in  
Another cause of CMR failure for  
a shielded optocoupler is direct  
coupling to the optocoupler  
output pins through CLEDO1 and  
CLEDO2 in Figure 21. Many factors  
influence the effect and magni-  
tude of the direct coupling includ-  
ing: the use of an internal or  
external output pull-up resistor,  
the position of the LED current  
setting resistor, the connection of  
the unused input package pins,  
and the value of the capacitor at  
the optocoupler output (CL).  
Figure 20. The HCPL-4506,  
HCPL-0466 and HCNW4506  
improve CMR performance by  
using a detector IC with an optic-  
ally transparent Faraday shield,  
which diverts the capacitively  
coupled current away from the  
sensitive IC circuitry. However,  
this shield does not eliminate the  
capacitive coupling between the  
LED and the optocoupler output  
pins and output ground as shown  
in Figure 21. This capacitive  
resistor is used (due to CLEDO2  
)
and an IF = 16 mA is required to  
obtain 10 kV/µs CMR.  
The placement of the LED current  
setting resistor effects the ability of  
the drive circuit to keep the LED on  
during transients and interacts with  
the direct coupling to the  
optocoupler output. For example,  
the LED resistor in Figure 22 is  
connected to the anode. Figure 23  
shows the AC equivalent circuit for  
Figure 22 during common mode  
transients. During a +dVcm/dt in  
Figure 23, the current available at  
the LED anode (Itotal) is limited by  
the series resistor. The LED current  
(IF) is reduced from its DC value by  
an amount equal to the current that  
Techniques to keep the LED in  
the proper state and minimize the  
effect of the direct coupling are  
discussed in the next two  
sections.  
coupling causes perturbations in  
the LED current during common  
mode transients and becomes the  
major source of CMR failures for  
a shielded optocoupler. The main  
design objective of a high CMR  
LED drive circuit becomes keep-  
ing the LED in the proper state  
(on or off) during common mode  
transients. For example, the  
CMR with the LED On  
(CMRL)  
A high CMR LED drive circuit  
must keep the LED on during  
common mode transients. This is  
flows through CLEDP and CLEDO1  
The situation is made worse  
.
recommended application circuit  
1-61  
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