V
N
– RMS INPUT-REFERRED NOISE – mV
0
f (-3 dB) – 3 dB BANDWIDTH – kHz
160
140
120
100
80
60
40
-40 -20
V
DD1
= 5 V
V
DD2
= 5 V
2.5
V
IN+
= 200 mV
V
IN+
= 100 mV
V
IN+
= 0 mV
T
A
= 25°C
V
DD1
= 5 V
V
DD2
= 5 V
RELATIVE AMPLITUDE – dB
-1
V
DD1
= 5 V
V
DD2
= 5 V
T
A
= 25 °C
-2
2.0
1.5
1.0
-3
0.5
0
-4
1
5
10
50 100
500
0
20
40
60
80
100
5
10
50
100
500
f – FREQUENCY – kHz
T
A
– TEMPERATURE – °C
f – FREQUENCY – KHz
Figure 19. Amplitude Response vs.
Frequency.
Figure 20. 3 dB Bandwidth vs.
Temperature
Figure 21. RMS Input-Referred Noise
vs. Recommended Application Circuit
Bandwidth.
Applications Information
Functional Description
Figure 22 shows the primary
functional blocks of the HCPL-
7840. In operation, the sigma-
delta modulator converts the
analog input signal into a high-
speed serial bit stream. The time
average of this bit stream is
directly proportional to the input
signal. This stream of digital data
is encoded and optically trans-
mitted to the detector circuit. The
detected signal is decoded and
converted back into an analog
signal, which is filtered to obtain
the final output signal.
Application Circuit
The recommended application
circuit is shown in Figure 23. A
floating power supply (which in
many applications could be the
same supply that is used to drive
the high-side power transistor) is
regulated to 5 V using a simple
three-terminal voltage regulator
(U1). The voltage from the cur-
rent sensing resistor, or shunt
(Rsense), is applied to the input
of the HCPL-7840 through an RC
anti-aliasing filter (R5, C3). And
finally, the differential output of
the isolation amplifier is
converted to a ground-referenced
single-ended output voltage with
a simple differential amplifier
circuit (U3 and associated com-
ponents). Although the applica-
tion circuit is relatively simple, a
few recommendations should be
followed to ensure optimal
performance.
Supplies and Bypassing
As mentioned above, an inexpen-
sive 78L05 three-terminal
regulator can be used to reduce
the gate-drive power supply
voltage to 5 V. To help attenuate
high frequency power supply
noise or ripple, a resistor or
inductor can be used in series
with the input of the regulator to
form a low-pass filter with the
regulator’s input bypass
capacitor.
As shown in Figure 23, 0.1
µF
bypass capacitors (C2, C4)
should be located as close as
possible to the input and output
power supply pins of the HCPL-
7840. The bypass capacitors are
required because of the high-
speed digital nature of the signals
inside the isolation amplifier. A
0.01
µF
bypass capacitor (C3) is
also recommended at the input
pin(s) due to the switched-
capacitor nature of the input
circuit. The input bypass capaci-
tor should be at least 1000 pF to
maintain gain accuracy of the
isolation amplifier.
Inductive coupling between the
input power-supply bypass
capacitor and the input circuit,
including the input bypass
capacitor and the input leads of
the HCPL-7840, can introduce
additional DC offset in the circuit.
Several steps can be taken to
minimize the mutual coupling
between the two parts of the
circuit, thereby improving the
offset performance of the design.
Separate the two bypass
capacitors C2 and C3 as much as
possible (even putting them on
opposite sides of the PC board),
while keeping the total lead
lengths, including traces, of each
bypass capacitor less than 20
mm. PC board traces should be
made as short as possible and
1-256
AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
