Package Characteristics
Parameter
Input-Output Momentary
Withstand Voltage
Resistance
(Input-Output)
Capacitance
(Input-Output)
Input Capacitance
Input IC Junction-to-Case
Thermal Resistance
Output IC Junction-to-Case
Thermal Resistance
Package Power Dissipation
Notes:
1. Absolute Maximum ambient operating
temperature means the device will not be
damaged if operated under these conditions.
It does not guarantee functionality.
2. The LED is ON when V
I
is low and OFF when
V
I
is high.
3. t
PHL
propagation delay is measured from the
50% level on the falling edge of the V
I
signal
to the 50% level of the falling edge of the V
O
signal. t
PLH
propagation delay is measured
from the 50% level on the rising edge of the
V
I
signal to the 50% level of the rising edge of
the V
O
signal.
4. PWD is defined as |t
PHL
- t
PLH
|.
%PWD (percent pulse width distortion) is
equal to the PWD divided by pulse width.
5. t
PSK
is equal to the magnitude of the worst
case difference in t
PHL
and/or t
PLH
that will
be seen between units at any given
temperature within the recommended
operating conditions.
Symbol
072X
772X
V
ISO
Min.
3750
3750
Typ.
Max.
Units
Vrms
Test Conditions
RH
≤50%,
t = 1 min.,
T
A
= 25°C
V
I-O
= 500 Vdc
f = 1 MHz
Fig.
Note
8, 9,
10
8
R
I-O
C
I-O
C
I
-772X
-072X
-772X
-072X
θ
jci
θ
jco
P
PD
10
12
0.6
3.0
145
160
140
135
150
Ω
pF
11
°C/W
Thermocouple
located at center
underside of package
mW
10. The Input-Output Momentary Withstand
Voltage is a dielectric voltage rating that
should not be interpreted as an input-output
continuous voltage rating. For the continuous
voltage rating refer to your equipment level
safety specification or Agilent Application
Note 1074 entitled “Optocoupler Input-Output
Endurance Voltage.”
11. C
I
is the capacitance measured at pin 2 (V
I
).
6. CM
H
is the maximum common mode voltage
slew rate that can be sustained while
maintaining V
O
> 0.8 V
DD2
. CM
L
is the
maximum common mode voltage slew rate
that can be sustained while maintaining
V
O
< 0.8 V. The common mode voltage slew
rates apply to both rising and falling common
mode voltage edges.
7. Unloaded dynamic power dissipation is
calculated as follows: C
PD
* V
DD2
* f + I
DD
*
V
DD
, where f is switching frequency in MHz.
8. Device considered a two-terminal device:
pins 1, 2, 3, and 4 shorted together and pins
5, 6, 7, and 8 shorted together.
9. In accordance with UL1577, each HCPL-072X
is proof tested by applying an insulation test
voltage
≥4500
V
RMS
for 1 second (leakage
detection current limit, I
I-O
≤5 µA).
Each
HCPL-772X is proof tested by applying an
insulation test voltage
≥4500
Vrms for 1
second (leakage detection current limit.
I
I-O
≤
5
µA.)
2.2
5
4
V
O
(V)
2.0
V
ITH
(V)
T
PLH
, T
PHL
(ns)
0 °C
25 °C
85 °C
2.1
0 °C
25 °C
85 °C
29
27
25
23
21
19
17
T
PHL
T
PLH
3
2
1
0
1.9
1.8
1.7
1.6
4.5
0
1
2
V
I
(V)
3
4
5
4.75
5
V
DD1
(V)
5.25
5.5
15
0
10
20 30
40
50
60 70
80
T
A
(C)
Figure 1. Typical output voltage vs. input
voltage.
Figure 2. Typical input voltage switching
threshold vs. input supply voltage.
Figure 3. Typical propagation delays vs.
temperature.
8
AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
